IMX35 datasheet(13/148 Pages) FREESCALE

13 / 148 page

i.MX35 Applications Processors for Automotive Products, Rev. 6

Freescale Semiconductor

Signal Descriptions: Special Function Related Pins

Some special functional requirements are supported in the device. The details about these special functions

and the corresponding pin names are listed in Table 5.

USBOH

High-speed

USB on-the-go

SDMA

Connectivity

peripherals

The USB module provides high performance USB on-the-go (OTG)

functionality (up to 480 Mbps), compliant with the USB 2.0

specification, the OTG supplement, and the ULPI 1.0 low pin count

specification. The module has DMA capabilities handling data

transfer between internal buffers and system memory.

WDOG

Watchdog

modules

ARM

Timer

peripherals

Each module protects against system failures by providing a method

of escaping from unexpected events or programming errors. Once

activated, the timer must be serviced by software on a periodic

basis. If servicing does not take place, the watchdog times out and

then either asserts a system reset signal or an interrupt request

signal, depending on the software configuration.

1 ARM = ARM1136 platform, SDMA = SDMA platform

Table 5. Special Function Related Pins

Function Name

Pin Name

Mux Mode

Detailed Description

External ARM Clock

EXT_ARMCLK

ALT0

External clock input for ARM clock.

External Peripheral Clock

I2C1_CLK

ALT6

External peripheral clock source.

External 32-kHz Clock

CAPTURE

ALT4

External clock input of 32 kHz, used when the internal

24M Oscillator is powered off, which could be

configured either from CAPTURE or CSPI1_SS1.

CSPI1_SS1

ALT2

Clock Out

CLKO

ALT0

Clock-out pin from CCM, clock source is controllable

and can also be used for debug.

Power Ready

GPIO1_0

ALT1

PMIC power-ready signal, which can be configured

either from GPIO1_0 or TX1.

TX1

ALT1

Tamper Detect

GPIO1_1

ALT6

Tamper-detect logic is used to issue a security

violation. This logic is activated if the tamper-detect

input is asserted. Tamper-detect logic is enabled by the

bit of IOMUXC_GPRA[2]. After enabling the logic, it is

impossible to disable it until the next reset.

Table 4. Digital and Analog Modules (continued)

Block

Mnemonic

Block Name

Domain1

Subsystem

Brief Description

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