HC05 datasheet(95/232 Pages) MOTOROLA

95 / 232 page

MC68HC05X16

Rev. 1

MOTOROLA

6-7

PROGRAMMABLE TIMER

ICF2 — Input capture ﬂag 2

This bit is set when a negative edge is detected by the input capture edge detector 2 at TCAP2;

an input capture interrupt will be generated if ICIE is set. ICF2 is cleared by reading the TSR and

then the input capture low register 2 ($1D).

1 (set)

–

A valid (negative) input capture has occurred.

0 (clear) –

No input capture has occurred.

OCF2 — Output compare ﬂag 2

This bit is set when the output compare 2 register contents match those of the free-running

counter; an output compare interrupt will be generated if OCIE is set. OCF2 is cleared by reading

the TSR and then the output compare 2 low register ($1F).

1 (set)

–

A valid output compare has occurred.

0 (clear) –

No output compare has occurred.

6.3

Input capture

‘Input capture’ is a technique whereby an external signal is used to trigger a read of the free

running counter. In this way it is possible to relate the timing of an external signal to the internal

counter value, and hence to elapsed time.

There are two input capture registers: input capture register 1 (ICR1) and input capture register 2 (ICR2).

The same input capture interrupt enable bit (ICIE) is used for the two input captures.

6.3.1

Input capture register 1 (ICR1)

The two 8-bit registers that make up the 16-bit input capture register 1 are read-only, and are used

to latch the value of the free-running counter after the input capture edge detector circuit 1 senses

a valid transition at TCAP1. The level transition that triggers the counter transfer is deﬁned by the

input edge bit (IEDG1). When an input capture 1 occurs, the corresponding ﬂag ICF1 in TSR is set.

An interrupt can also accompany an input capture 1 provided the ICIE bit in TCR is set. The 8 most

signiﬁcant bits are stored in the input capture high 1 register at $14, the 8 least signiﬁcant bits in

the input capture low 1 register at $15.

Address

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

State

on reset

Input capture high 1

$0014

Undeﬁned

Input capture low 1

$0015

Undeﬁned

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