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STM32F101C6U6ATR датащи(PDF) 46 Page - STMicroelectronics |
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STM32F101C6U6ATR датащи(HTML) 46 Page - STMicroelectronics |
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46 / 73 page ![]() Electrical characteristics STM32F101x4, STM32F101x6 46/74 Doc ID 15058 Rev 3 All timings are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. 5.3.8 PLL characteristics The parameters given in Table 26 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 25. Low-power mode wakeup timings Symbol Parameter Typ Unit tWUSLEEP (1) 1. The wakeup times are measured from the wakeup event to the point at which the user application code reads the first instruction. Wakeup from Sleep mode 1.8 µs tWUSTOP (1) Wakeup from Stop mode (regulator in run mode) 3.6 µs Wakeup from Stop mode (regulator in low-power mode) 5.4 tWUSTDBY (1) Wakeup from Standby mode 50 µs Table 26. PLL characteristics Symbol Parameter Value Unit Min(1) Typ Max(1) 1. Based on device characterization, not tested in production. fPLL_IN PLL input clock(2) 2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with the range defined by fPLL_OUT. 18.0 25 MHz PLL input clock duty cycle 40 60 % fPLL_OUT PLL multiplier output clock 16 36 MHz tLOCK PLL lock time 200 µs Jitter Cycle-to-cycle jitter 300 ps |
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