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TDF8599B датащи(PDF) 33 Page - NXP Semiconductors

номер детали TDF8599B
подробное описание детали  I2C-bus controlled dual channel 43 W/4 W, single channel 85 W/1 W class-D power amplifier with load diagnostics
PDF  54 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

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TDF8599B_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 29 July 2009
33 of 54
NXP Semiconductors
TDF8599B
I2C-bus controlled dual channel class-D power amplifier
[3]
Total harmonic distortion is measured at the bandwidth of 22 Hz to 20 kHz, AES brick wall. The maximum limit is guaranteed but may
not be 100 % tested.
[4]
Vripple =Vripple(max) = 2 V (p-p); Rs =0 Ω.
[5]
B = 22 Hz to 20 kHz, AES brick wall, Rs =0 Ω.
[6]
B = 22 Hz to 20 kHz, AES brick wall, independent of Rs.
[7]
Vi =Vi(max) = 0.5 V RMS.
14. Application information
14.1 Output power estimation (Stereo mode)
The output power, just before clipping, can be estimated using Equation 5:
(5)
Where,
VP = supply voltage (V)
RL = load impedance (Ω)
RDSon = drain-source on-state resistance (Ω)
Rs = series resistance of the output inductor (Ω)
tw(min) = minimum pulse width(s) depending on output current (s)
fosc = oscillator frequency in Hz (typically 320 kHz)
The output power at 10 % THD can be estimated by:
where
Po(1) = 0.5 % and Po(2) =10%.
Figure 26 and Figure 27 show the estimated output power at THD = 0.5 % and
THD = 10 % as a function of supply voltage for different load impedances in stereo mode.
P
o
R
L
R
L
2R
DSon
R
s
+
()
×
+
------------------------------------------------------


1t
w min
()
f
osc
2
----------
×


V
P
×
2
×
2R
L
×
---------------------------------------------------------------------------------------------------------------------------------------- W
[]
=
P
o2
()
1.25
P
o1
()
×
=



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