TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

29

POST OFFICE BOX 1443

timing of XF changing from output to input mode (see Figure 24)

NO

’C32 - 40

’C32 - 50

’C32 - 60

UNIT

NO.

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

46

th(H3H-XF01)

Hold time, XF after H3 high

13†

12†

11†

ns

47

tsu(XF)

Setup time, XF before H1 low

9

9

8

ns

48

th(XF)

Hold time, XF after H1 low

0

0

0

ns

† Assured from characterization but not tested

Execute

Load of IOF

Buffers Go

from Ouput

to Input

Synchronizer

Delay

Value on Pin

Seen in IOF

H3

H1

XFx

INXFx Bit†

I / OXFx Bit†

46

47

48

Data

Sampled

Data

Seen

Output

† I / OXFx represents either bit 1 or bit 5 of the IOF register, and INXFx represents either bit 3 or bit 7 of the IOF register.

Figure 24. Change of XF From Output to Input Mode