TMS320C32PCM datasheet(5/44 Pages) TI

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TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

TMS320C32 Pin Functions (Continued)

TYPE†

DESCRIPTION

CONDITIONS

WHEN

NAME

NO.

TYPE†

DESCRIPTION

SIGNAL IS

IN HIGH Z‡

CONTROL SIGNALS (9 PINS)

RESET

Reset. When RESET is a logic low, the device is in the reset condition. When

RESET becomes a logic high, execution begins from the location specified by the

reset vector.

INT3 – INT0

External interrupts

IACK

O/Z

Interrupt acknowledge. IACK is generated by the IACK instruction. This signal can

be used to indicate the beginning or end of an interrupt-service routine.

MCBL / MP

Microcomputer boot loader / microprocessor mode

XF1 – XF0

I/O/Z

External flags. XF1 and XF0 are used as general-purpose I / Os or used to support

interlocked-processor instructions.

SERIAL PORT SIGNALS (6 PINS)

CLKX0

I/O/Z

Serial-port 0 transmit clock. CLKX0 is the serial shift clock for the serial port 0

transmitter.

DX0

I/O/Z

Data-transmit output. Serial port 0 transmits serial data on DX0.

FSX0

I/O/Z

Frame-synchronization pulse for transmit. The FSX0 pulse initiates the

transmit-data process over DX0.

CLKR0

I/O/Z

Serial-port 0 receive clock. CLKR0 is the serial-shift clock for the serial-port 0

receiver.

DR0

I/O/Z

Data receive. Serial port 0 receives serial data on DR0.

FSR0

I/O/Z

Frame-synchronization pulse for receive. The FSR0 pulse initiates the

receive-data process over DR0.

TIMER SIGNALS (2 PINS)

TCLK0

I/O/Z

Timer clock 0. As an input, TCLK0 is used by timer 0 to count external pulses. As

an output, TCLK0 outputs pulses generated by timer 0.

TCLK1

I/O/Z

Timer clock 1. As an input, TCLK1 is used by timer 1 to count external pulses. As

an output, TCLK1 outputs pulses generated by timer 1.

CLOCK SIGNALS (3 PINS)

CLKIN

Input to the internal oscillator from an external clock source

O/Z

External H1 clock. H1 has a period equal to twice CLKIN.

O/Z

External H3 clock. H3 has a period equal to twice CLKIN.

RESERVED (5 PINS)

EMU0 – EMU2

Reserved for emulation. Use 18 k

Ω–22 kΩ pullup resistors to 5 V.

EMU3

O/Z

Reserved for emulation

SHZ

Shutdown high impedance. When active, SHZ shuts down the ’C32 and places

all 3-state I/O pins in the high-impedance state. SHZ is used for board-level testing

to ensure that no dual-drive conditions occur. CAUTION: A low on SHZ corrupts

’C32 memory and register contents. Reset the device with SHZ high to restore it

to a known operating condition.

† I = input, O = output, Z = high-impedance state

‡ S = SHZ active, H = HOLD active, R = RESET active

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