LTC4241

13

sn4241 4241f

The current limit and the foldback current level (at the

As a design aid, the current limit and foldback level for

0.005

11A

1.8A

0.006

9.2A

1.5A

0.007

7.9A

1.3A

0.008

6.9A

1.1A

0.009

6.1A

1.0A

0.01

5.5A

0.9A

The current limit for the internal 12V switch is set at

850mA folding back to 300mA and the –12V switch at

450mA folding back to 200mA.

In systems where it is possible to exceed the current limit

for a short amount of time, it might be necessary to

prevent the analog current loop from responding quickly

so the output voltage does not droop. This can be accom-

plished by adding an RC filter across the sense resistor as

about 1.5

µs and a 1µF capacitor gives a delay of about

15

µs.

power path (Figure 1). The resistor R3 provides load

current fault detection and R6 prevents high frequency

oscillation in Q3.

pulls low. A low-to-high transition at the AUXON pin

initiates the AUXGATE ramp up (Figure 7). The AUXGATE

is pulled high by an internal 10

µA current source and the

pass transistor is allowed to turn on. As the auxiliary

controller does not have the foldback current limit feature

and timer control, the inrush supply current during power-

up is limited by ramping the gate of the pass transistor at

a controlled rate (dV/dt = 10

µA/C3) where C3 is the total

external capacitance between AUXGATE and ground.

With proper selection of the C3 capacitance value, the

limited to a value less than the current limit set by the sense

resistor R3. This prevents the circuit breaker from tripping

the 3.3V auxiliary supply line. For example, for C3 = 10nF,

A high-to-low transition at the AUXON pin initiates a

AUXGATE ramp-down at a slope of –200

µA/C3 as the

AUXGATE is pulled to ground by an internal 200

µA current

source. This will allow the load capacitance on the supply

line to discharge while the AUXGATE pulls low to turn off

the external N-channel pass transistor.

APPLICATIO S I FOR ATIO

Figure 6. Delay in the Current Limit Loop

4

3

2

1

R1

0.007

Ω

R4

10

Ω

R7

100

Ω

20

Ω

Q1

IRF7413

5A

1

µF

C1

0.047

µF

17

16

15

18

* ADDITIONAL PINS

OMITTED FOR

CLARITY

LTC4241*

Figure 7. Power-Up/Down Sequence for 3.3V Auxiliary Supply

Power-Up/Down Sequence for 3.3V Auxiliary Supply

The 3.3V auxiliary supply is controlled by placing an

AUXON

2V/DIV

AUXGATE

5V/DIV

2V/DIV

5ms/DIV

4241 F07