LTC4241

12

sn4241 4241f

TIMER pin is immediately pulled low when ON goes low.

Thermal Shutdown

The internal switches for the 12V and –12V supplies are

protected by an internal current limit and thermal shut-

down circuit. When the temperature of the chip reaches

150

°C, only the switches controlling the PCI supplies will

be latched off and the FAULT pin will be pulled low.

Short-Circuit Protection for PCI Power Supplies

During a normal power-up sequence for the PCI power

supplies, if the TIMER is done ramping and any supply is

still in current limit, all of the pass transistors will be

immediately turned off, the TIMER and FAULT pin will be

pulled low as shown in Figure 4.

spikes — for example, from a fan turning on — from

causing false trips of the circuit breaker. The chip will stay

in the latched-off state until the ON pin is cycled low then

To prevent excessive power dissipation in the pass tran-

sistors and to prevent voltage spikes on the supplies

during short-circuit conditions, the current limit on each

PCI supply, except the 3.3V auxiliary supply, is designed

to be a function of the output voltage. As the output voltage

drops, the current limit decreases. Unlike a traditional

circuit breaker function where huge currents can flow

before the breaker trips, the current foldback feature

assures that the supply current will be kept at a safe level

and prevent voltage glitches when powering up into a

short.

APPLICATIO S I FOR ATIO

If a short-circuit occurs after the PCI supplies are powered

up, the shorted supply’s current will drop immediately to

the limit value (Figure 5).

If the supply remains in current limit for more than 17

µs,

all of the PCI supplies except the 3.3V auxiliary supply will

be latched off. The 17

µs delay prevents quick current

Figure 4. Power-Up into a Short on 3.3V Output

Figure 5. Short-Circuit on 5V Followed by Circuit Breaker Reset

The current limit and the foldback current level for the 5V

and 3.3V outputs are both a function of the external sense

shown in Figure 1, a sense resistor is connected between

ON

10V/DIV

TIMER

10V/DIV

GATE

10V/DIV

PWRGD

10V/DIV

5V/DIV

5V/DIV

FAULT

10V/DIV

20ms/DIV

4241 F04

ON

10V/DIV

TIMER

10V/DIV

GATE

10V/DIV

PWRGD

10V/DIV

5V/DIV

5V/DIV

FAULT

10V/DIV

20ms/DIV

4241 F05