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LTC4264

4264f

APPLICATIONS INFORMATION

During classiﬁcation, the PSE presents a ﬁxed voltage

between –15.5V and –20.5V to the PD (Figure 6). With

the input voltage in this range, the LTC4264 asserts a load

current from the GND pin through the RCLASS resistor. The

magnitude of the load current is set with the selection of

the RCLASS resistor. The resistor value associated with

each class is shown in Table 2.

Table 2. Summary of IEEE 802.3af Power Classiﬁcations and

LTC4264 RCLASS Resistor Selection

CLASS

USAGE

MAXIMUM

POWER LEVELS

AT INPUT OF PD

(W)

NOMINAL

CLASSIFICATION

LOAD CURRENT

(mA)

LTC4264

RCLASS

RESISTOR

(

Ω, 1%)

Default

0.44 to 12.95

Open

Optional

0.44 to 3.84

10.5

124

Optional

3.84 to 6.49

18.5

69.8

Optional

6.49 to 12.95

45.3

Reserved by IEEE. See Apps

30.9

Undeﬁned IEEE. See Apps

22.1

A substantial amount of power is dissipated in the LTC4264

during classiﬁcation. The IEEE 802.3af speciﬁcation limits

the classiﬁcation time to 75ms in order avoid excessive

heating. The LTC4264 is designed to handle the power

dissipation during the probe period. If the PSE probing

exceeds 75ms, the LTC4264 may overheat. In this situa-

tion, the thermal protection circuit will engage and disable

the classiﬁcation current source, protecting the LTC4264

from damage. When the die cools, classiﬁcation is auto-

matically resumed.

Classiﬁcation presents a challenging stability problem

for the PSE due to the wide range of loads possible. The

LTC4264 has been designed to avoid PSE interoperability

problems by maintaining a positive I-V slope throughout

the signature and classiﬁcation ranges up to UVLO turn-

on as shown in Figure 6b. The positive I-V slope avoids

areas of negative resistance and helps prevent the PSE

from power cycling or getting “stuck” during signature

or classiﬁcation probing. In the event a PSE overshoots

beyond the classiﬁcation voltage range, the available load

current aids in returning the PD back into the classiﬁcation

voltage range. (The PD input may otherwise be “trapped”

by a reverse-biased diode bridge and the voltage held by

the 0.1µF capacitor.) By gently ramping the classiﬁcation

current on and maintaining a positive I-V slope until UVLO

turn-on, the LTC4264 provides a well behaved load, as-

suring interoperability with any PSE.

GND

RCLASS

VIN

LTC4264

CONSTANT

LOAD

CURRENT

INTERNAL

TO LTC4264

4264 F06a

RCLASS

CURRENT PATH

PSE

PSE CURRENT MONITOR

PSE

PROBING

VOLTAGE

SOURCE

–15.5V TO –20.5V

INPUT VOLTAGE (V)

–40

4264 F06b

–10

–20

–30

Figure 6a. PSE Probing PD During Classiﬁcation

Figure 6b. LTC4264 Positive I-V Slope

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