LTC4264IDE datasheet(10/24 Pages) LINER

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LTC4264

4264f

APPLICATIONS INFORMATION

RX –

RX +

TX –

TX +

RJ45

POWERED

DEVICE (PD)

INTERFACE

AS DEFINED

BY IEEE 802.3af

4264 F04

SPARE –

SPARE+

TO PHY

BR2

0.1

µF

100V

BR1

GND

LTC4264

VIN

Figure 4. PD Front End Using Diode Bridges on Main and Spare Inputs

pin high will reduce the signature resistor to 10k which is

an invalid signature per the IEEE 802.3af speciﬁcations.

This will prevent a PSE from detecting and powering the

PD. This invalid signature is present in the PSE probing

range of –2.8V to –10V. When the input rises above –10V,

the signature resistor reverts to 25k to minimize power

dissipation in the LTC4264. To disable the signature, tie

SHDN to GND. Alternately, the SHDN pin can be driven

high with respect to VIN. When SHDN is high, all functions

are disabled. For normal operation tie SHDN to VIN.

CLASSIFICATION

Once the PSE has detected a PD, the PSE may option-

ally classify the PD. Classiﬁcation provides a method for

more efﬁcient allocation of power by allowing the PSE

to identify lower-power PDs and assign the appropriate

power level to these devices. For each class, there is an

associated load current that the PD asserts onto the line

during classiﬁcation probing. The PSE measures the PD

load current in order to assign the proper PD classiﬁca-

tion. Class 0 is included in the IEEE 802.3af speciﬁcation

to cover PDs that do not support classiﬁcation. Class 1-3

partition PDs into three distinct power ranges as shown in

Table 2. Class 4 is reserved by the IEEE 802.3af committee

for future use. The new Class 5 deﬁned here is available

for system vendors to implement a unique classiﬁcation

for use in closed systems and is not deﬁned or supported

by the IEEE 802.3af. With the extended classiﬁcation

range available in the LTC4264, it is possible for system

designers to deﬁne multiple classes using load currents

between 40mA and 75mA.

GND

VIN

SHDN

LTC4264

SIGNATURE DISABLE

4264 F05

25k SIGNATURE

RESISTOR

16k

PSE

Figure 5. 25k Signature Resistor with Disable

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