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PSD913F2 датащи(PDF) 58 Page - STMicroelectronics

номер детали PSD913F2
подробное описание детали  Configurable Memory System on a Chip for 8-Bit Microcontrollers
PDF  91 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD913F2 датащи(HTML) 58 Page - STMicroelectronics

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PSD935G2
PSD9XX Family
57
APD EN
PMMR0 BIT 1=1
ALE
RESET
CSI
CLKIN
TRANSITION
DETECTION
EDGE
DETECT
APD
COUNTER
POWER DOWN
(PDN)
DISABLE BUS
INTERFACE
SECONDARY
FLASH SELECT
MAIN FLASH SELECT
SRAM SELECT
PD
CLR
PD
DISABLE MAIN AND
SECONDARY FLASH/SRAM
PLD
SELECT
Figure 24. APD Logic Block
The
PSD935G2
Functional
Blocks
(cont.)
Enable APD
Set PMMR0 Bit 1 = 1
PSD in Power
Down Mode
ALE/AS idle
for 15 CLKIN
clocks?
RESET
Yes
No
OPTIONAL
Disable desired inputs to PLD
by setting PMMR0 bit 4
and PMMR2 bits 0.
Figure 25. Enable Power Down Flow Chart



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