| поискавой системы для электроныых деталей |
|
PSD913F2 датащи(PDF) 50 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
PSD913F2 датащи(HTML) 50 Page - STMicroelectronics |
|
50 / 91 page ![]() PSD935G2 PSD9XX Family 49 The PSD935G2 Functional Blocks (cont.) 9.4.2.4 Address In Mode For microcontrollers that have more than 16 address lines, the higher addresses can be connected to Ports A, B, C, D or F and are routed as inputs to the PLDs. The address input can be latched by the address strobe (ALE/AS). Any input that is included in the DPLD equations for the Main Flash, Boot Flash, or SRAM is considered to be an address input. 9.4.2.5 Data Port Mode Port F can be used as a data bus port for a microcontroller with a non-multiplexed address/data bus. The Data Port is connected to the data bus of the microcontroller. The general I/O functions are disabled in Port F if the port is configured as Data Port. Data Port Mode is automatically configured in PSDsoft when a non-multiplexed bus MCU is selected. 9.4.2.3 Address Out Mode For microcontrollers with a multiplexed address/data bus, Address Out Mode can be used to drive latched addresses onto the port pins. These port pins can, in turn, drive external devices. Either the output enable or the corresponding bits of both the Direction Register and Control Register must be set to a ‘1’ for pins to use Address Out Mode. This must be done by the MCU at run-time. See Table 18 for the address output pin assignments on Ports E, F and F for various MCUs. Note: Do not drive address lines with Address Out Mode to an external memory device if it is intended for the MCU to boot from the external device. The MCU must first boot from PSD memory so the Direction and Control register bits can be set. MCU Port E (3:0) Port E (7:4) Port F (3:0) Port F (7:4) Port G (3:0) Port G (7:4) 80C51XA N/A * Addr (7:4) N/A * Addr (7:4) Addr (11:8) N/A 80C251 N/A N/A N/A N/A Addr (11:8) Addr (15:12) (Page Mode) All Other Eight-Bit Addr (3:0) Addr (7:4) Addr (3:0) Addr (7:4) Addr (3:0) Addr (7:4) Multiplexed 8-Bit Non-Mux N/A N/A N/A N/A Addr (3:0) Addr (7:4) Bus Table 18. I/O Port Latched Address Output Assignments |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |