M38041FFHKP datasheet(356/387 Pages) RENESAS

356 / 387 page

3-66

REJ09B0212-0100Z

Rev.1.00

Jan 14, 2005

3804 Group (Spec.H)

APPENDIX

3.5 Control registers

Fig. 3.5.25 Structure of Timer Z low-order, Timer Z high-order

Fig. 3.5.26 Structure of Timer Z mode register

Timer Z low-order, Timer Z high-order

b7 b6 b5 b4 b3 b2 b1 b0

Timer Z low-order (TZL), Timer Z high-order (TZH)

(addresses 002816, 002916)

Functions

At reset R W

• Set each timer count value.

[At write]

• Depending on the write control bit (bit 3 of

TZM), the value set to this register is written to

each timer and the corresponding timer latch

at the same time, or is written only to the latch.

[At read]

• The corresponding timer count value is read

out by reading this register.

• Read both registers in order of TZH and TZL

following.

• Write both registers in order of TZL and TZH

following.

Timer Z mode register

b7 b6 b5 b4 b3 b2 b1 b0

Timer Z mode register

(TZM: address 002A16)

Name

Functions

At reset R W

3 Timer Z write control

bit

Output level latch

0: “L” output

1: “H” output

Refer to Table 3.5.2.

0: Count start

1: Count stop

CNTR2 active edge

switch bit

Timer Z count stop

bit

Timer/Event counter

mode switch bit (Note)

0: Writing data to both latch

and timer simultaneousuly

1: Writing data only to latch

0 0 0: Timer/Event counter mode

0 0 1: Pulse output mode

0 1 0: Pulse period

measurement mode

0 1 1: Pulse width

measurement mode

1 0 0: Programmable waveform

generating mode

1 0 1: Programmable one-shot

generating mode

1 1 0: Not available

1 1 1: Not available

0: Timer mode

1: Event counter mode

b2b1b0

Timer Z operating

mode bits

Note: When selecting the modes except the timer/event counter mode, set “0” to this bit.

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