M38041FFHKP datasheet(358/387 Pages) RENESAS

358 / 387 page

3-68

REJ09B0212-0100Z

Rev.1.00

Jan 14, 2005

3804 Group (Spec.H)

APPENDIX

3.5 Control registers

Fig. 3.5.27 Structure of PWM control register

Fig. 3.5.28 Structure of PWM prescaler

PWM control register

b7 b6 b5 b4 b3 b2 b1 b0

PWM control register (PWMCON: address 002B16)

Name

Functions

At reset R W

PWM function

enable bit

Nothing is arranged for these bits. These are

write disabled bits. When these bits are read

out, the contents are “0”.

0 : PWM disabled

1 : PWM enabled

Count source

selection bit

0 : f(XIN)

1 : f(XIN)/2

PWM prescaler

b7 b6 b5 b4 b3 b2 b1 b0

PWM prescaler

(PREPWM: address 002C16)

Undefined

At reset R W

Functions

•Set the PWM period.

•The value set in this register is written to both

PWM prescaler pre-latch and PWM prescaler

latch at the same time.

• When data is written to this register during

PWM output, the pulse corresponding to

changed value is output at the next period.

• When this register is read out, the count value

of the PWM prescaler latch is read out.

Undefined

PWM register

b7 b6 b5 b4 b3 b2 b1 b0

PWM register

(PWM: address 002D16)

Undefined

At reset R W

Functions

• Set the PWM “H” level output interval.

• The value set in this register is written to both

PWM register pre-latch and PWM register

latch at the same time.

• When data is written to this register during

PWM output, the pulse corresponding to

changed value is output at the next period.

• When this register is read out, the contents of

the PWM register latch is read out.

Undefined

Fig. 3.5.29 Structure of PWM register

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