поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

M38041FFHKP датащи(PDF) 352 Page - Renesas Technology Corp

номер детали M38041FFHKP
подробное описание детали  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38041FFHKP датащи(HTML) 352 Page - Renesas Technology Corp

Back Button M38041FFHKP Datasheet HTML 348Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 349Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 350Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 351Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 352Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 353Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 354Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 355Page - Renesas Technology Corp M38041FFHKP Datasheet HTML 356Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 352 / 387 page
background image
3-62
REJ09B0212-0100Z
Rev.1.00
Jan 14, 2005
3804 Group (Spec.H)
APPENDIX
3.5 Control registers
Fig. 3.5.18 Structure of Serial I/O2 control register
Fig. 3.5.19 Structure of Watchdog timer control register
Serial I/O2 control register
b7 b6 b5 b4 b3 b2 b1 b0
Serial I/O2 control register
(SIO2CON: address 001D16)
b
0
Name
0
Functions
At reset R W
0
0
1
2
0
3 Serial I/O2 port
selection bit
4
0
SRDY2 output
enable bit
0: I/O port (P53)
1: SRDY2 signal output
0: LSB first
1: MSB first
0: External clock
1: Internal clock
5
0
Transfer direction
selection bit
7
6
0
Serial I/O2
synchronous
clock selection bit
P51/SOUT2
P-channel output
disable bit
0: I/O port (P51, P52)
1: SOUT2, SCLK2 signal output
0 0 0: f(XIN)/8
0 0 1: f(XIN)/16
0 1 0: f(XIN)/32
0 1 1: f(XIN)/64
1 1 0: f(XIN)/128
1 1 1: f(XIN)/256
0: CMOS output
(in output mode)
1: N-channel open-drain
output (in output mode)
b2b1b0
Internal
synchronous clock
selection bits
0
Watchdog timer control register
b7 b6 b5 b4 b3 b2 b1 b0
Watchdog timer control register
(WDTCON: address 001E16)
b
6
0
STP instruction
disable bit
Watchdog timer H
count source selection
bit
0: STP instruction enabled
1: STP instruction disabled
0: Watchdog timer L
underflow
1: f(XIN)/16 or f(XCIN)/16
Functions
Name
At reset R W
7
0
0
1
1
1
2
1
3
1
4
1
5
1
Watchdog timer H
(for read-out of high-order 6 bit)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com