SH7101 datasheet(29/560 Pages) RENESAS

29 / 560 page

Rev.1.00 Sep. 18, 2008 Page xxix of xxxiv

REJ09B0069-0100

Tables

Section 1 Overview

Table 1.1

Pin Functions..........................................................................................................

Table 1.2

Differences from SH7046 Group ........................................................................... 12

Table 1.3

Differences from SH7047 Group ........................................................................... 13

Section 2 CPU

Table 2.1

Initial Values of Registers ...................................................................................... 18

Table 2.2

Sign Extension of Word Data................................................................................. 20

Table 2.3

Delayed Branch Instructions .................................................................................. 21

Table 2.4

T Bit ....................................................................................................................... 21

Table 2.5

Immediate Data Accessing ..................................................................................... 21

Table 2.6

Absolute Address Accessing .................................................................................. 22

Table 2.7

Displacement Accessing......................................................................................... 22

Table 2.8

Addressing Modes and Effective Addresses .......................................................... 23

Table 2.9

Instruction Formats................................................................................................. 26

Table 2.10

Classification of Instructions.................................................................................. 29

Table 2.11

Symbols Used in Instruction Code, Operation, and Execution States Tables ........ 32

Table 2.12

Data Transfer Instructions ...................................................................................... 33

Table 2.13

Arithmetic Operation Instructions .......................................................................... 35

Table 2.14

Logic Operation Instructions.................................................................................. 37

Table 2.15

Shift Instructions .................................................................................................... 38

Table 2.16

Branch Instructions................................................................................................. 39

Table 2.17

System Control Instructions ................................................................................... 40

Section 3 MCU Operating Modes

Table 3.1

Selection of Operating Modes ................................................................................ 45

Table 3.2

Maximum Operating Clock Frequency for Each Clock Mode............................... 46

Table 3.3

Pin Configuration ................................................................................................... 46

Section 4 Clock Pulse Generator

Table 4.1

Damping Resistance Values ................................................................................... 56

Table 4.2

Crystal Resonator Characteristics........................................................................... 56

Section 5 Exception Processing

Table 5.1

Types of Exception Processing and Priority........................................................... 59

Table 5.2

Timing for Exception Source Detection and Start of Exception Processing .......... 60

Table 5.3

Exception Processing Vector Table........................................................................ 61

Table 5.4

Calculating Exception Processing Vector Table Addresses ................................... 62

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