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SH7101 датащи(PDF) 97 Page - Renesas Technology Corp |
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SH7101 датащи(HTML) 97 Page - Renesas Technology Corp |
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97 / 560 page ![]() Section 5 Exception Processing Rev.1.00 Sep. 18, 2008 Page 63 of 522 REJ09B0069-0100 5.2 Resets 5.2.1 Types of Reset Resets have the highest priority of any exception source. There are two types of resets: manual resets and power-on resets. As table 5.5 shows, both types of resets initialize the internal status of the CPU. In power-on resets, all registers of the on-chip peripheral modules are initialized; in manual resets, they are not. Table 5.5 Reset Status Conditions for Transition to Reset Status Internal Status Type RES WDT Overflow MRES CPU/INTC On-Chip Peripheral Module PFC, IO Port Low ⎯ ⎯ Initialized Initialized Initialized Power-on reset High Overflow High Initialized Initialized Not initialized Manual reset High ⎯ Low Initialized Not initialized Not initialized 5.2.2 Power-On Reset Power-On Reset by RES Pin: When the RES pin is driven low, the LSI becomes to be a power- on reset state. To reliably reset the LSI, the RES pin should be kept at low for at least the duration of the oscillation settling time when applying power or when in standby mode (when the clock circuit is halted) or at least 25 tcyc when the clock circuit is running. During power-on reset, CPU internal status and all registers of on-chip peripheral modules are initialized. See appendix A, Pin States, for the status of individual pins during the power-on reset status. In the power-on reset status, power-on reset exception processing starts when the RES pin is first driven low for a set period of time and then returned to high. The CPU will then operate as follows: 1. The initial value (execution start address) of the program counter (PC) is fetched from the exception processing vector table. 2. The initial value of the stack pointer (SP) is fetched from the exception processing vector table. 3. The vector base register (VBR) is cleared to H'00000000 and the interrupt mask bits (I3 to I0) of the status register (SR) are set to H'F (B'1111). 4. The values fetched from the exception processing vector table are set in PC and SP, then the program begins executing. |
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