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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8S2245 датащи(PDF) 184 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 184 Page - Renesas Technology Corp |
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184 / 818 page  Section 6 Bus Controller Rev.3.00 Mar. 26, 2007 Page 142 of 772 REJ09B0355-0300 Bit 5—Burst ROM Enable (BRSTRM): Selects whether area 0 is used as a burst ROM interface. In normal mode, the selection can be made from the entire external space. Bit 5 BRSTRM Description 0 Area 0 is basic bus interface (Initial value) 1 Area 0 is burst ROM interface Bit 4—Burst Cycle Select 1 (BRSTS1): Selects the number of burst cycles for the burst ROM interface. Bit 4 BRSTS1 Description 0 Burst cycle comprises 1 state 1 Burst cycle comprises 2 states (Initial value) Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a burst ROM interface burst access. Bit 3 BRSTS0 Description 0 Max. 4 words in burst access (Initial value) 1 Max. 8 words in burst access Bits 2 to 0—Reserved: Only 0 should be written to these bits. |
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