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H8S2245 датащи(PDF) 175 Page - Renesas Technology Corp

номер детали H8S2245
подробное описание детали  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S2245 датащи(HTML) 175 Page - Renesas Technology Corp

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Section 6 Bus Controller
Rev.3.00 Mar. 26, 2007 Page 133 of 772
REJ09B0355-0300
6.1.3
Pin Configuration
Table 6.1 summarizes the pins of the bus controller.
Table 6.1
Bus Controller Pins
Name
Symbol
I/O
Function
Address strobe
AS
Output
Strobe signal indicating that address output on
address bus is enabled.
Read
RD
Output
Strobe signal indicating that external space is
being read.
High write
HWR
Output
Strobe signal indicating that external space is
to be written, and upper half (D
15 to D8) of data
bus is enabled.
Low write
LWR
Output
Strobe signal indicating that external space is
to be written, and lower half (D
7 to D0) of data
bus is enabled.
Chip select 0
CS0
Output
Strobe signal indicating that area 0 is selected.
Chip select 1
CS1
Output
Strobe signal indicating that area 1 is selected.
Chip select 2
CS2
Output
Strobe signal indicating that area 2 is selected.
Chip select 3
CS3
Output
Strobe signal indicating that area 3 is selected.
Wait
WAIT
Input
Wait request signal when accessing external
3-state access space.
Bus request
BREQ
Input
Request signal that releases bus to external
device.
Bus request acknowledge
BACK
Output
Acknowledge signal indicating that bus has
been released.
Bus request output
BREQO
Output
External bus request signal used when
internal bus master accesses external space
when external bus is released.



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