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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8S2245 датащи(PDF) 336 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 336 Page - Renesas Technology Corp |
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336 / 818 page  Section 9 16-Bit Timer Pulse Unit (TPU) Rev.3.00 Mar. 26, 2007 Page 294 of 772 REJ09B0355-0300 Bits 4 and 3—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the input clock edge. When a both-edges count is selected, a clock divided by two from the input clock can be selected. (e.g. φ/4 both edges = φ/2 rising edge). If phase counting mode is used on channels 1, and 2, this setting is ignored and the phase counting mode setting has priority. Bit 4 Bit 3 CKEG1 CKEG0 Description 0 0 Count at rising edge (Initial value) 1 Count at falling edge 1 — Count at both edges Note: Internal clock edge selection is valid when the input clock is φ/4 or slower. If φ/1 is selected as the input clock, this setting is ignored and count at falling edge of φ is selected. Bits 2, 1, and 0—Time Prescaler 2, 1, and 0 (TPSC2 to TPSC0): These bits select the TCNT counter clock. The clock source can be selected independently for each channel. Table 9.4 shows the clock sources that can be set for each channel. Table 9.4 TPU Clock Sources Internal Clock External Clock Channel φφφφ/1 φφφφ/4 φφφφ/16 φφφφ/64 φφφφ/256 φφφφ/1024 TCLKA TCLKB TCLKC TCLKD 0 1 2 Legend: : Setting Blank: No setting |
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