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M32C/8A датащи(PDF) 209 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 209 Page - Renesas Technology Corp |
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209 / 372 page ![]() M32C/8A Group 16. Three-Phase Motor Control Timer Function Rev.1.00 Jul 15, 2007 Page 192 of 352 REJ09B0385-0100 Figure 16.13 Triangular Wave Modulation Operation (Three-Phase Mode 1)(INV01 and INV00 = 11b) Dead time DUB0 = 0 Triangular Waveform as a Carrier Wave (Three-phase mode 1: INV0 and INV00 = 11b) Carrier wave TB2S bit in the TABSR register Signal wave Timer B2 Timer A4 start trigger signal(1) TA4 register Reload register(1) Timer A4 one-shot pulse(1) INV14 bit in INVC1 register = 0 (Active Low) Dead time Values are transferred to the three-phase output shift register from registers IDB0 and IDB1 Rewrite registers IDB0 and IDB1 Upper arm (U-phase) output signal(1) Lower arm (U-phase) output signal(1) U-phase U-phase INV14 bit in INVC1 register = 1 (Active High) U-phase U-phase IR bit in the TB2IC register b 1 a 1 b 2 a 2 b 3 b 4 a 4 DU0 = 1 DU1 = 0 DUB1 = 1 DUB1 = 0 DUB0 = 0 DU0 = 1 DU1 = 1 Set to 0 by an interrupt request acknowledgement or by program INV13 bit in the INVC1 register TA41 register NOTE: 1. Internal signals. See Three-Phase Motor Control Timer Function Block Diagram. The above applies under the following conditions: - INVC0 register: Bits INV01 and INV00 = 11b (ICTB2 counter is incremented by 1 at the falling edge of the timer A1 reload control signal) INV02 bit = 1 (Three-phase control timer function used) INV03 bit = 1 (Three-phase control timer output enabled) INV06 bit = 0 (Triangular wave modulation mode) - INVC1 register: INV10 bit = 0 (Timer B2 underflow) INV11 bit = 1 (Timers A11, A21, A41 used (Three-phase mode 1)) INV15 bit = 0 (Dead time enabled) INV16 bit = 1 (Rising edge of the three-phase output shift register (U-, V-, W-phase)) - ICTB2 register = 01h (Every second timer B2 underflow.) (ICTB2 register = 02h, if INV01 bit = 0) The following shows examples to change PWM output levels. - Default value of the timer: TA41 = b 1, TA4 = a1 (Registers TA4 and TA41 are rewritten every time the timer B2 interrupt occurs.) First time TA41 = b 2, TA4 = a2, second time TA41 = b3, TA4 = a3 - Default value of the registers IDB0 and IDB1: DU0 = 1, DUB0 = 0, DU1 = 0, and DUB1 = 1 They are changed to DU0 = 1, DUB0 = 0, DU1 = 1, and DUB1 = 0 at the third timer B2 interrupt. b 3 a 1 b 1 a 1 a 2 a 3 a 4 b 1 a 2 b 2 b 3 a 3 a 5 b 1 b 2 b 3 b 4 b 5 b 2 b 4 a 4 b 4 b 5 a 3 |
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