R8C2K datasheet(158/471 Pages) RENESAS

158 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 141 of 450

REJ09B0406-0110

16.1.2

Pulse Output Mode

In pulse output mode, the internally generated count source is counted, and a pulse with inverted polarity is

output from the TRAIO pin each time the timer underflows (refer to Table 16.3 Pulse Output Mode

Specifications).

Figure 16.6 shows the TRAIOC Register in Pulse Output Mode.

NOTE:

1. The level of the output pulse becomes the level when the pulse output starts when the TRAMR

Table 16.3

Pulse Output Mode Specifications

Item

Specification

Count sources

f1, f2, f8, fOCO

Count operations

• Decrement

• When the timer underflows, the contents in the reload register is reloaded and

the count is continued.

Divide ratio

1/(n+1)(m+1)

n: Value set in TRAPRE register, m: Value set in TRA register

Count start condition

1 (count starts) is written to the TSTART bit in the TRACR register.

Count stop conditions • 0 (count stops) is written to the TSTART bit in the TRACR register.

• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.

Interrupt request

generation timing

When timer RA underflows [timer RA interrupt].

INT1/TRAIO pin

function

Pulse output, programmable output port, or INT1 interrupt(1)

Read from timer

The count value can be read by reading registers TRA and TRAPRE.

Write to timer

• When registers TRAPRE and TRA are written while the count is stopped, values

are written to both the reload register and counter.

• When registers TRAPRE and TRA are written during the count, values are

written to the reload register and counter. (Refer to 16.1.1.1 Timer Write

Control during Count Operation.)

Select functions

• TRAIO signal polarity switch function

The TEDGSEL bit in the TRAIOC register selects the level at the start of pulse

output.(1)

• Pulse output stop function

Output from the TRAIO pin is stopped by the TOPCR bit in the TRAIOC

•INT1/TRAIO pin select function

P1_7 or P1_5 is selected by the TIOSEL bit in the TRAIOC register.

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