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R8C2K датащи(PDF) 161 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 161 Page - Renesas Technology Corp |
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161 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 144 of 450 REJ09B0406-0110 Figure 16.7 TRAIOC Register in Event Counter Mode Timer RA I/O Control Register Symbol Address After Reset TRAIOC 0101h 00h Bit Symbol Bit Name Function RW INT1 _____ /TRAIO select bit 0 : INT1 _____ /TRAIO pin (P1_7) 1 : INT1 _____ /TRAIO pin (P1_5) NOTE: 1. Set to 0. TIOSEL b1 b0 0 : Starts counting at rising edge of the TRAIO input or TRAIO starts output at “L” 1 : Starts counting at falling edge of the TRAIO input or TRAIO starts output at “H” 0 — (b2) b7 b6 b5 b4 b3 b2 0 — (b7-b6) RW TEDGSEL RW TRAIO polarity sw itch bit RW TIPF0 RW TOPCR RW — When the same value from the TRAIO pin is sampled three times continuously, the input is determined. TRAIO output control bit Set to 0 in event counter mode. Nothing is assigned. If necessary, set to 0. When read, the content is 0. Reserved bit TRAIO input filter select bits(1) b5 b4 0 0 : No filter 0 1 : Filter w ith f1 sampling 1 0 : Filter w ith f8 sampling 1 1 : Filter w ith f32 sampling TIPF1 |
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