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R8C датащи(PDF) 79 Page - Renesas Technology Corp

номер детали R8C
подробное описание детали  RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  199 Pages
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производитель  RENESAS [Renesas Technology Corp]
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R8C датащи(HTML) 79 Page - Renesas Technology Corp

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R8C/10 Group
Rev.1.20 Jan 27, 2006
page 69 of 180
REJ09B0019-0120
Figure 12.15 TYZMR Register and PUM Register in Timer Mode
Timer Y, Z mode register
Symbol
Address
After reset
TYZMR
008016
0016
Bit name
Function
Bit symbol
b7 b6 b5 b4 b3 b2 b1 b0
TZMOD1
TYS
TYWC
TYMOD0
TZMOD0
Timer Y operation
mode bit
NOTES:
1. The IR bit in the INT2IC register may be set to “1” (interrupt requested) when the R1EDG bit is rewritten.
Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.
2. When TYS bit=1 (starts counting), the value set in the TYWC bit is valid. If TYWC bit=0, the timer Y count value is
written to both reload register and counter. If TYWC bit=1, the timer Y count value is written to the reload register
only.
When TYS bit=0 (stops counting), the timer Y count value is written to both reload register and counter regardless
of how the TYWC bit is set.
Timer Y write
control bit(2)
0 : Write to reload register and counter
simultaneously
1 : Write to reload register
0 : Timer mode
TZWC
TZS
0 : Stops counting
1 : Starts counting
Timer Z-related bit
Timer Y count
start flag
0
RW
RW
RW
RW
RW
RW
R1EDG
0 : Rising edge
1 : Falling edge
INT2/CNTR1 polarity
switching bit(1)
RW
RW
RW
Bit name
Function
Bit symbol
TYOPL
TZOPL
INOSEG
INOSTG
Timer Z-related bits
Timer Y, Z waveform output control register
Symbol
Address
After reset
PUM
008416
0016
b7
b6
b5 b4
b3
b2
b1
b0
Timer Y output level
latch
Invalid in timer mode
0
0
0
0
(b3-b0)
Reserved bit
Must set to “0”
RW
RW
RW
RW
RW
RW
12.2 Timer (Timer Y)



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