R8C datasheet(59/199 Pages) RENESAS

59 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 49 of 180

REJ09B0019-0120

Figure 10.14 TCC0 Register and TCC1 Register

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10.2.4 INT3 Interrupt

_____

______

INT3 interrupts are triggered by INT3 inputs. The TCC07 bit in the TCC0 register should be se to “0”

______

_______

(INT3). The INT3 input has a digital filter which can be sampled by one of three sampling clocks. The

sampling clock is selected using the TCC11 to TCC10 bits in the TCC1 register. The IR bit in the

INT3IC register is set to “1” (interrupt requested) when the sampled input level matches three times.

The P3_3 bit in the P3 register indicates the previous value before filtering regardless of values set in

the TCC11 to TCC10 bits.

_______

The INT3 pin is shared with the TCIN pin.

_____

When setting the TCC07 bit to “1” (fRING128), INT3 interrupts are triggered by fRING128 clock. The IR

bit in the INT3IC register is set to “1” (interrupt requested) every fRING128 clock cycle or every half

fRING128 clock cycle.

Figure 10.14 shows the TCC0 and TCC1 registers.

10.2 INT Interrupt

Timer C control register 0

SymbolAddressAfter reset

TCC0009A16

0016

Bit name

Function

Bit symbol

b7 b6 b5 b4 b3 b2 b1 b0

0 0 : f1

0 1 : f8

1 0 : f32

1 1 : Avoid this setting

TCC04

TCC02

TCC01

TCC00

TCC03

Capture control bit

Timer C count source select

bit(1)

0 : Capture disabled

1 : Capture enabled

TCC07

b2 b1

Timer C control register 1

SymbolAddressAfter reset

TCC1009B16

0016

Bit name

Function

Bit symbol

b7 b6 b5 b4 b3 b2 b1 b0

TCC11

TCC10

0 0 : Rising edge

0 1 : Falling edge

1 0 : Both edges

1 1 : Avoid this setting

b4 b3

b1 b0

INT3 input filter select bit(1)

NOTES:

1. Input is recognized only when the same value from INT3 pin is sampled three times in succession.

(b6-b5)

INT3 interrupt/capture input

polarity select bit(1, 2)

INT3 interrupt/capture input

switching bit(1, 2)

0 : INT3

1 : fRING128

Reserved bit

(b7-b2)

0 0 : No filter

0 1 : Filter with f1 sampling

1 0 : Filter with f8 sampling

1 1 : Filter with f32 sampling

NOTES:

1. Modify this bit when the TCC00 bit is set to “0” (count stops).

2. The IR bit in the INT3IC may be set to “1” (interrupt requested) when the TCC03, TCC04, or TCC07 bit is rewritten.

Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.

reserved bit

Set to "0"

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