STV0118 datasheet(15/42 Pages) STMICROELECTRONICS

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IV - FUNCTIONAL DESCRIPTION (continued)

IV.6 - Input Demultiplexer

The incoming 27Mbit/s YCrCb data is demulti-

plexed into a ‘blue-difference’ chroma information

stream, a ‘red-diffe rence’ chroma information

stream and a luma information stream. Incoming

data bits are treated as blue, red or luma samples

according to their relative position with respect to

the sync signals in use and to the content of con-

figuration bits “Syncin_ad” (slave modes) or “Syn-

cout_ad” (master mode).

The ITU-R601 recommendation defines the black

luma level as Y = 16dec and the maximum white

luma level as Y = 235dec. Similarly it defines 225

quantization levels for the color difference compo-

nents (Cr, Cb), centered around 128.

Accordingly, incoming YCrCB samples can be

saturated in the input multiplexer with the following

rules :

- for Cr or Cb samples :

Cr, Cb > 240

⇒ Cr, Cb saturated at 240

Cr,Cb < 16

⇒ Cr, Cb saturated at 16

- for Y samples :

Y > 235

⇒ Y saturated at 235

Y< 16

⇒ Y saturated at 16

This avoids having to heavily saturate the com-

posite video codes before digital-to-analog con-

version in case erroneous or unrealistic YCrCb

samples are input to the encoder (there may

otherwise be overflow errors in the codes driving

the DACs), and therefore avoids genera-ting a

distorded output waveform.

However, in some applications, it may be desirable

to let ‘extreme’ YCrCb codes pass through the

demultiplexer. This is also possible, provided that

bit “maxdyn” is set in configuation register 6.

In this case, only codes 00hex and FFhex are

overridden: if such codes are found in the active

video samples, they are forced to 01hex and FE-

hex.

In any case, the YCrCb codes are not overridden

for EAV/SAV decoding

The demultiplexer is also able to handle 54Mbit/s

YCrCb streams for dual encoding applications. Re-

fer to Section IV.17, “Dual Encoding Application -

54Mbit/s YCrCB interface”.

IV.7 - Sub-carrier Generation

A Direct Digital Frequency Synthesizer (DDFS)

using a 24-bit phase accumulator, generates the

required color sub-carrier frequency.This oscillator

feeds a quadraturemodulator which modulatesthe

baseband chrominance components.

The sub-carrier frequency is obtained from the

following equation :

Fsc = (24-bit Increment Word / 2

24) x CKREF

Hard-wired Increment Word values are available

for each standard(except for ‘NTSC-4.43’) and can

be automatically selected. Alternatively (according

to bit ‘selrst’ in Reg. 2.), the frequency can be fully

customized by programming other values into a

dedicated Increment Word Register (Reg. 10-11-

12). This allows for instance to encode “NTSC-

4.43” or ”PAL-M-4.43”.

This is done with the following procedure :

- Program the required increment in Registers 10

to 12

- Set bit ‘selrst’ to ‘1’ in Configuration Register 2

- Perform a software reset (Reg. 6).

Caution : this sets back all bits from Reg. 7

onwards to their default value, when they can be

reset.

Warning : if a standard change occurs after the

software reset, the increment value is automatically

re-initialized with the hardwired or loaded value

according to bit selrst.

The reset phase of the color sub-carrier can also

be software-controlled (Reg. 13-14).

The sub-carrier phase can be periodically reset to

its nominal value to compensate for any drift intro-

duced by the finite accuracy of the calculations.

Sub-carrier phase adjustment can be performed

every line, every eight field, every four field, or

every two field (Register 2 bits valrst[1:0]).

STV0118

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