HD404612FS datasheet(39/91 Pages) RENESAS

39 / 91 page

HD404618 Series

Input/Output

The MCU provides 26 input/output pins and 4 input pins, including 10 high-current pins (15 mA, max.). A

program-controlled pull-up MOS transistor is provided for each input/output pin.

The output buffer is turned on and off by the data control register (DCR) during input through an

input/output pin.

I/O pin circuit types are shown in table 19.

D Ports (D

0–D13): Consist of ten 1-bit input/output pins and four input pins. Pins D0–D9 are high-current

I/O pins (15 mA, max.). The sum current of the pins can go up to 100 mA. These pins are set by the SED

and SEDD instructions, reset by the RED and REDD instructions, and tested by the TD and TDD

instructions. Output data is stored in the port data register.

The on/off status of the output buffer is controlled by D port data control registers (DCRB, DCRC, and

DCRD) that are mapped to the memory address area. Pins D

10–D13 are input-only pins.

Two operating modes are available to pins D

12 and D13: digital input mode and analog input mode.

The

operating modes are set by bits 0 and 1 of port mode register B (PMRB). In the digital input mode, these

pins can be used as input pins with the same input characteristics as the I/O pins. In the analog input mode,

the result of a comparison with the reference voltage can be read as input data. The reference voltage is

input by the D

11/VCref pin.

R Ports: Consist of sixteen 4-bit I/O ports. Data is input to these ports by the LAR and LBR instructions

and output from them by the LRA and LRB instructions.

The on/off status of the output buffers of the R ports are controlled by R port data control registers (DCR0–

DCR3) that are mapped to memory addresses.

Pins R0

0, R01, and R02 are multiplexed with pins SCK , SI, and SO, respectively.

Pins R3

1, R32, and R33 are multiplexed with TIMO, INT0, and INT1, respectively. Refer to figure 24.

Pull-Up MOS Transistor Control: A program-controlled pull-up MOS transistor is provided for each

input/output pin.

The on/off status of all these transistors is controlled by bit 3 of port mode register B (PMRB), and the

on/off status of an individual transistor can also be controlled by the port data register (PDR) of the

corresponding pin. This enables on/off control of each individual pin. Refer to table 20.

The on/off status of each transistor and the peripheral function mode of each pin can be set independently.

How to Deal with Unused I/O Pins: I/O pins that are not needed by the user system must be connected to

CC to prevent LSI malfunctions due to noise.

These pins must either be pulled up to V

CC by their pull-up

transistors or by resistors of about 100 k

Ω.

HD404612FS датащи(PDF) 39 Page - Renesas Technology Corp

HD404612FS датащи(HTML) 39 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

датащи скачать

ссылки URL