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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M306V2EEFS датащи(PDF) 127 Page - Renesas Technology Corp |
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M306V2EEFS датащи(HTML) 127 Page - Renesas Technology Corp |
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127 / 271 page  Rev.1.40 Oct 06, 2004 page 127 of 269 M306V2ME-XXXFP, M306V2EEFP (1) Function for outputting a parity error signal With the error signal output enable bit (bit 7 of address 037D16) assigned “1”, you can output an “L” level from the TxD2 pin when a parity error is detected. In step with this function, the generation timing of a transmission completion interrupt changes to the detection timing of a parity error signal. Figure 2.11.28 shows the output timing of the parity error signal. Figure 2.11.28 Output timing of the parity error signal ST : Start bit P : Even Parity SP : Stop bit D0 D1 D2 D3 D4 D5 D6 D7 P SP ST Hi-Z Transfer clock RxD2 TxD2 Receive complete flag “H” “L” “H” “L” “H” “L” “1” • LSB first “0” (2) Direct format/inverse format Connecting the SIM card allows you to switch between direct format and inverse format. If you choose the direct format, D0 data is output from TxD2. If you choose the inverse format, D7 data is inverted and output from TxD2. Figure 2.11.29 shows the SIM interface format. Figure 2.11.29 SIM interface format P : Even parity D0 D1 D2 D3 D4 D5 D6 D7 P Transfer clcck TxD2 (direct) TxD2 (inverse) D7 D6 D5 D4 D3 D2 D1 D0 P Figure 2.11.30 shows the example of connecting the SIM interface. Connect TxD2 and RxD2 and apply pull-up. Figure 2.11.30 Connecting the SIM interface Microcomputer SIM card TxD2 RxD2 |
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