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ORSPI4 датащи(PDF) 184 Page - Lattice Semiconductor

номер детали ORSPI4
подробное описание детали  Dual SPI4 Interface and High-Speed SERDES FPSC
PDF  263 Pages
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производитель  LATTICE [Lattice Semiconductor]
домашняя страница  http://www.latticesemi.com
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ORSPI4 датащи(HTML) 184 Page - Lattice Semiconductor

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Lattice Semiconductor
ORCA ORSPI4 Data Sheet
184
Figure 96. Status Channel Reference Points with Respect to Clock Edge (Edge Aligned Legacy Mode)
Table 64. Status Path Interface ORSPI4 Timing in Legacy Mode
Note: This table compares the OIF Specification requirements vs. the ORSPI4 Specification. There is no OIF Specification for LVDS buffers.
ORSPI4 Timing in
Legacy Mode
Symbol
Description
Min
Max
Units
fD
TDCLK/RDCLK frequency
450
MHz
fS
TSCLK/RSCLK frequency
112.5
MHz
—
TSCLK/RSCLK duty cycle
40
60
%
tdia
Data invalid window with respect to clock edge
(Reference point C)
—
0.3
ns
tdib
Data invalid window with respect to clock edge
(Reference point C)
—
0.45
ns
tS*
Setup time for TSTAT with respect to TSCLK -
LVTTL Buffers (Reference point D)
0.5
—
ns
Setup time for TSTAT with respect to TSCLK -
LVDS Buffers (Reference point D)
0.7
—
ns
tH*
Hold time for TSTAT with respect to TSCLK -
LVTTL Buffers (Reference point D)
1.2
—
ns
Hold time for TSTAT with respect to TSCLK -
LVDS Buffers (Reference point D)
1.0
—
ns
RSCLK
RSTAT
(C)
Launch Edge
T
dia
T
dib
(D)
Capture Edge
t
s
t
h
TSCLK
TSTAT



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