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TMS320DM335 датащи(PDF) 88 Page - Texas Instruments |
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TMS320DM335 датащи(HTML) 88 Page - Texas Instruments |
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88 / 156 page ![]() TMS320DM335 Digital Media System-on-Chip (DMSoC) SPRS528 – JULY 2008 www.ti.com Table 3-21. Power Management Features (continued) Power Management Features Description Module clock frequency scaling Module clock frequency can be scaled to reduce switching power PLL power-down The PLLs can be powered-down when not in use to reduce switching power ARM Sleep Mode ARM Wait-for-Interrupt sleep mode Disable ARM clock to reduce active power System Sleep Modes Deep Sleep mode Stop all device clocks and power down internal oscillators to reduce active power to a minimum. Registers and memory are preserved. I/O Management USB Phy power-down The USB Phy can be powered-down to reduce USB I/O power DAC power-down The DAC's can be powered-down to reduce DAC power DDR self-refresh and power down The DDR / mDDR device can be put into self-refresh and power down states Detailed Device Description 88 Submit Documentation Feedback |
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