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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST92163 датащи(PDF) 215 Page - STMicroelectronics |
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ST92163 датащи(HTML) 215 Page - STMicroelectronics |
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215 / 224 page  215/224 ST92163 - ELECTRICAL CHARACTERISTICS MULTIFUNCTION TIMER EXTERNAL TIMING TABLE (VDD = 3.0 - 5.5V (1),T A =0°C+ 70°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified) Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period, standard timer prescaler and counter programmed values. The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz. (1) 3.0 - 4.0V voltage range is only available on devices with suffix L or V, with different frequency limitatio ns (L: 8 MHz, V: 16 MHz) (2) n = 1 if the input is rising OR falling edge sensitive n = 3 if the input is rising AND falling edge sensitive (3) In Autodiscrimination mode Legend: Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2; 2 x OSCIN period when OSCIN is divided by 2; OSCIN period x PLL factor when the PLL is enabled. MULTIFUNCTION TIMER EXTERNAL TIMING N ° Symbol Parameter Value Unit Note Formula Min Max 1TwCTW External clock/trigger pulse width n x Tck n x 42 - ns (2) 2TwCTD External clock/trigger pulse distance n x Tck n x 42 - ns (2) 3TwAED Distance between two active edges 3 x Tck 125 - ns 4TwGW Gate pulse width 6 x Tck 250 - ns 5TwLBA Distance between TINB pulse edge and the fol- lowing TINA pulse edge Tck 42 - ns (3) 6TwLAB Distance between TINA pulse edge and the fol- lowing TINB pulse edge 0- ns (3) 7TwAD Distance between two TxINA pulses 0 - ns (3) 8TwOWD Minimum output pulse width/distance 3 x Tck 125 - ns |
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