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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST92163 датащи(PDF) 77 Page - STMicroelectronics |
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ST92163 датащи(HTML) 77 Page - STMicroelectronics |
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77 / 224 page  77/224 ST92163 - RESET AND CLOCK CONTROL UNIT (RCCU) 5.3 CLOCK MANAGEMENT The various programmable features and operating modes of the CCU are handled by four registers: – MODER (Mode Register) This is a System Register (R235, Group E). The input clock divide-by-two and the CPU clock prescaler factors are handled by this register. – CLKCTL (Clock Control Register) This is a Paged Register (R240, Page 55). The low power modes and the interpretation of the HALT instruction are handled by this register. – CLK_FLAG (Clock Flag Register) This is a Paged Register (R242, Page 55). This register contains various status flags, as well as control bits for clock selection. – PLLCONF (PLL Configuration Register) This is a Paged Register (R246, Page 55). The PLL multiplication and division factors are programmed in this register. Figure 36. Clock Control Unit Programming Quartz PLL 1/16 x 1/2 DIV2 CKAF_SEL 1/N oscillator MX(1:0) 0 1 0 1 0 1 CKAF_ST CSU_CKSEL 6/8/10/14 1 0 XT_DIV16 DX(2:0) CLOCK2 CLOCK1 (MODER) (CLK_FLAG) (CLKCTL) (PLLCONF) (CLK_FLAG) CK_AF INTCLK to Peripherals and CPU Clock Prescaler XTSTO P (CLK_FLAG) Wait for Interrupt and Low Power Modes: LPOW FI (CLKCTL) selects Low Power operation automatically on entering WFI mode. WFI_CKSEL (CLKCTL) selects the CK_AF clock automatically, if present, on entering WFI mode. XTSTO P (CLK_FLAG) automatically stops the Xtal oscillator when the CK_AF clock is present and selected. OUTPLL_2 (USB CLOCK) 1/16 Internal WFI and LPOWFI=1 and WFI_CKSEL = 1 1 0 oscillator RC |
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