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ST7261 датащи(PDF) 54 Page - STMicroelectronics

номер детали ST7261
подробное описание детали  LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, ROM MEMORY, LVD, WDG, TIMER
PDF  80 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7261 датащи(HTML) 54 Page - STMicroelectronics

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11.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fCPU, and TA.
11.5.1 General Timings
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch.
∆t
c(INST) is the number of tCPU cycles needed to finish
the current instruction execution.
11.5.2 CONTROL TIMING CHARACTERISTICS
Note 1:
Not tested in production, guaranteed by design.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
tc(INST)
Instruction cycle time
fCPU=8MHz
2
3
12
tCPU
250
375
1500
ns
tv(IT)
Interrupt reaction time 2)
tv(IT) = ∆tc(INST) + 10 tCPU
fCPU=8MHz
10
22
tCPU
1.25
2.75
µs
CONTROL TIMINGS
Symbol
Parameter
Conditions
Value
Unit
Min 1)
Typ. 1)
Max 1)
fOSC
Oscillator Frequency
12
MHz
fCPU
Operating Frequency
8
MHz
tRL
External RESET
Input pulse Width
1.5
tCPU
tPORL
Internal Power Reset Duration
514
tCPU
TRSTL
Reset Pin Output Pulse Width
10
µs
tWDG
Watchdog Time-out
fcpu = 8MHz
65536
8.192
4194304
524.288
tCPU
ms
tOXOV
Crystal Oscillator
Start-up Time
20
30
40
ms
tDDR
Power up rise time
from VDD = 0 to 4V
100
ms



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