Data Sheet

ADuCM310

Rev. A Page 11 of 27

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

POWER REQUIREMENTS

Power Supply Voltage Range

AV

DD

2.9

3.3

3.6

V

Measured between AVDDx and

AGND

IOV

DD

2.9

3.3

3.6

V

Measured between IOVDDxand

AGND

Analog Power Supply Currents

AV

DD Current

6.5

7.2

mA

ADC, VDACs, IDACs off

Digital Power Supply Current

Current in Normal Mode

DV

DD

29

32

mA

CLKCON1[2:0] = [000b]

IOV

DD

2.7

3.1

mA

All GPIO pull-ups enabled

Additional Power Supply Currents

ADC1

3.1

3.6

mA

ADC continuously converting at

100 kSPS

ADC Input Buffer1

4.1

4.8

mA

Both buffers enabled

IDAC1

26.5

30

mA

DAC1

2.7

3.1

mA

Total for all VDACs driving

maximum allowed load with

DACxDAT = 0

VDAC2 and VDAC31

−1.7

mA

I

DD when VDAC2 and VDAC3 are

driving maximum allowed load

with DACxDAT set to 0

VDAC6 and VDAC71

1

mA

I

DD sourced from the VDACVDD

supply when VDAC6 and VDAC7

are driving the maximum allowed

load with DACxDAT set to 0

1 These numbers are not production tested but are guaranteed by design and/or characterization data at production release.

2 The input current is the total input current including the input pad and mux leakage plus the charge current for the full input circuit. The input current relates to the

ADC sampling frequency.

3 The internal reference calibration and trimming are performed when the processor operates in normal mode with CD = 0, when ADC is enabled and converting, when

IDACs are all on, and when VDACs are on. VREF accuracy can vary under other operating conditions.

4 Measured using the following box method:

(

)

(

)

(

)

6

1

2.5

×

−

×

−

Minimum

e

Temperatur

Maximum

e

Temperatur

e

Temperatur

Any

at

Minimum

V

e

Temperatur

Any

at

Maximum

V

REF

REF

5 VDAC linearity specifications are calculated with following ranges:

VDAC0 and VDAC1 = +150 mV to +2.699 V

VDAC2 and VDAC3: −150 mV to −4.22 V

VDAC4 and VDAC5: +150 mV to +2.98 V

VDAC6: +150 mV to +4.747 V

VDAC7: +150 mV to +4.297 V

6 Analog Devices, Inc., production IDAC full-scale trimming conditions include PVDD_IDACx pin voltage = 0.7 V, all IDACs on.

7 The long-term stability specifications is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

8 For all VDAC specifications for VDAC0, VDAC1, VDAC4, and VDAC5, DACxCON[10:9] = 11.

9 VDACx minimum and maximum limits apply to the internal reference only (DACxCON[1:0] = 00

b). AVDDx supply valid only with typical specifications.

10 The average current from the GPIO pins must not exceed 3 mA per pin. See Figure 22.