ADUCM310 datasheet(11/28 Pages) AD

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ADuCM310

Data Sheet

Rev. A Page 10 of 27

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

EXTERNAL RESET

External Reset Minimum Pulse

Width1

1.5

µs

Minimum pulse width required on

external RESET pin to trigger a

reset sequence

Reset Pin Glitch Immunity1

Maximum low pulse width on RESET

pin that does not generate a reset

TEMPERATURE SENSOR

Accuracy1

1.25

1.37

1.494

Indicates die temperature; ADC

measured voltage for temperature

sensor channel without calibration,

A = 25°C

FLASH/EE MEMORY

Endurance

10,000

Cycles

Data Retention

Years

J = 85°C

INTERNAL HIGH POWER OSCILLATOR

MHz

Used as input to PLL to generate

80 MHz clock

Accuracy

−2.25

+2.25

INTERNAL LOW POWER OSCILLATOR

32.768

kHz

Accuracy

−12

±8

+12

LOGIC INPUTS

Input Low Voltage (V

INL)

0.2 × IOV

Input High Voltage (V

INH)

0.7 × IOV

Short-Circuit Current1

LOGIC OUTPUTS

Output High Voltage (V

OH)

IOV

DD − 0.4

SOURCE = 2 mA

Output Low Voltage (V

OL)

0.4

SINK = 2 mA

Short-Circuit Current1

INPUT LEAKAGE CURRENT

Logic 1

µA

INH = 3.6 V

Internal Pull-Up Disabled

−20

+20

Logic 0

µA

INH = 0 V

Internal Pull-Up Disabled

−20

+20

Pull-Up

kΩ

If not disabled, disabled at reset;

pull-up can be described as an

80 µA (typical) current source

CRYSTAL INPUTS XCLKI AND XCLKO

(16 MHz)

Logic Inputs, XCLKI Only

Input Low Voltage (V

INL)

1.1

Input High Voltage (V

INH)

1.7

XCLKI Input Capacitance

XCLKO Output Capacitance

MICROCONTROLLER UNIT CLOCK RATE

Using PLL Output1

0.05

MHz

PROCESSOR START-UP TIME

At Power-On1

Includes kernel power-on

execution time

After Reset Event

1.44

Includes kernel power-on

execution time

After Processor Power Down

Mode 1, Mode 2, or Mode 3

3 to 5

CLK

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