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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PSD833F2 датащи(PDF) 24 Page - STMicroelectronics |
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PSD833F2 датащи(HTML) 24 Page - STMicroelectronics |
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24 / 110 page  PSD835G2 PSD8XX Family 23 Figure 4. Data Polling Flow Chart START READ DQ5 & DQ7 at VALID ADDRESS YES YES YES NO NO NO DQ7 = DATA7 DQ5 =1 DQ7 = DATA READ DQ7 FAIL Program/Erase Operation Failed Issue Reset Instruction PASS Program/Erase Operation is Completed The PSD835G2 Functional Blocks (cont.) 9.1.1.7.2 Data Toggle Checking the Data Toggle bit on DQ6 is a method of determining whether a Program or Erase instruction is in progress or has completed. Figure 5 shows the Data Toggle algorithm. When the MCU issues a programming instruction, the embedded algorithm within the PSD835G2 begins. The MCU then reads the location to be programmed in Flash to check status. Data bit DQ6 of this location will toggle each time the MCU reads this location until the embedded algorithm is complete. The MCU continues to read this location, checking DQ6 and monitoring the Error bit on DQ5. When DQ6 stops toggling (two consecutive reads yield the same value), and the Error bit on DQ5 remains ‘0’, then the embedded algorithm is complete. If the Error bit on DQ5 is ‘1’, the MCU should test DQ6 again, since DQ6 may have changed simultaneously with DQ5 (see Figure 5). The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded algorithm attempted to program, or if the MCU attempted to program a ‘1’ to a bit that was not erased (not erased is logic ‘0’). |
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