MK68564 datasheet(23/46 Pages) STMICROELECTRONICS

23 / 46 page

output pin as long as no data is loaded into the trans-

mit buffer.

Note : If a character is loaded into the transmit buf-

fer before enabling the transmitter, that character

will be sent in place of a flag.

An abort sequence may be transmitted at any time

by issuing the Send Abort command (command 1).

This causes at least eight, but less than fourteen,

ones to be sent before the output reverts back to

continuous flags. It is possible that the Abort se-

quence (eight 1’s) could follow up to five continuous

ones (allowed by the zero insertion logic) and, thus,

cause as many as thirteen ones to be sent. Any data

being transmitted and any data in the transmit buffer

is lost when an abort is issued.

The zero insertion logic in the transmitter will auto-

matically insert a 0 after five continuous ones in the

data stream. This does not apply to flags or aborts.

Start of Transmission. Transmission will begin

with the loading of the first character into the transmit

buffer if the transmitter is already enabled. For CRC

to be calculated correctly on each frame, the CRC

generator must be initialized to all ones before the

first character is loaded. This is accomplished by is-

suing a Reset Tx CRC Generator command in the

Command Register. The first non-flag character

transmitted is the address field. The SIO does not

automatically transmit a station address, this is left

to the programmer. The SIO will only transmit flags

and CRC characters automatically.

SDLC Transmit Characteristics. Any length SDLC

frame can be transmitted. All characters are trans-

mitted with the least-significant bits first. All data is

shifted out of the Transmit Data pin (TxD) on the fal-

ling edge of the Transmit Clock (TxC). The transmit-

ter transmit from one to eight data bits per character.

This requires right-hand justification of data written

to the transmit buffer, if the word length selected is

less than eight bits per character. When the pro-

grammed character length is six or seven bits, the

unused bits in the transmit buffer are ignored. If a

word length of five bits per character or less is se-

lected, the data loaded into the transmit buffer must

be formatted as described in the Transmit Control

The number of bits per character to be transmitted

can be changed on the fly. Any data, written to the

transmit buffer after the bits per character field is

changed, are affected by the change. The same is

true of any characters in the buffer at the time the

bits per character field is changed. The change in

the number of bits per character does not affect the

character in the process of being shifted out. Flag

characters are always eigth bits in length, and CRC

is always 16 bits in length, regardless of the pro-

grammed bits per character. A transmitted frame

can be terminated by CRC and a flag, by a flag only,

or by an abort. This is controlled by the Tx Under-

run/EOM Latch and the Send Abort command.

Data Transfers. A Transmit Interrupt is generated

each time the transmit buffer becomes empty. The

interrupt may be satisfied either by writing another

character into the transmit buffer or by resetting the

Transmit Interrupt Pending latch with a Reset Tx In-

terrupt Pending command. If the interrupt is satisfied

with this command, and nothing more is written into

the transmit buffer, there are no further transmitter

interrupts, and a Transmit Underrun condition will

occur when the data in the shift register is shifted

out. When another character is written to the buffer

and loaded into the shift register, the transmit buffer

can again become empty and interrupt the CPU.

Following the flags in an SDLC operation, the 8-bit

address field, control field, and information field may

be sent to the SIO, using the Transmit Interrupt

mode. The SIO transmits the frame check sequence

using the Transmit Underrun feature.

When the transmitter is first enabled, the transmit

buffer is already empty and obviously cannot then

become empty. Therefore, no transmit interrupt can

occur until after the first data character is written to

the transmit buffer.

Another way of detecting when the transmitter re-

quires service is to poll the Tx Buffer Empty bit in Sta-

tus Register 0. This bit is set to a one every time the

data in the transmit buffer is downloaded into the

transmit shift register. When data is written to the

transmit buffer, this bit is reset to zero.

The SIO has all the signals and controls necessary

to implement a DMA transfer routine for the trans-

mitter. The routine may be configured to enable the

DMA controller, after the first character is written into

the transmit buffer, using the TxRDY output pin to

signal the DMA that the transmitter requires service.

The DMA transfer can be terminated, when the DMA

block count is reached, using the Tx Underrun/EOM

interrupt.

Transmit Underrun/End of Message. SDLC-like

protocols do not have provisions for fill characters

within a message. The SIO, therefore, automatically

terminates an SDLC frame when the transmit data

buffer is empty, and the output shift register has no

MK68564

23/46

MK68564 датащи(PDF) 23 Page - STMicroelectronics

MK68564 датащи(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

датащи скачать

ссылки URL