ADSP-21990BBC datasheet(21/50 Pages) AD

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ADSP-21990

Rev. A

Page 21 of 50

August 2007

ELECTRICAL CHARACTERISTICS—ADSP-21990BST

Parameter

Conditions

Test Conditions

Min

Typ

Max

Unit

VIH

High Level Input Voltage

@ VDDEXT = Maximum

2.0

VDDEXT

VIH

High Level Input Voltage

@ VDDEXT = Maximum

2.2

VDDEXT

VIL

High Level Input Voltage

1, 2

@ VDDEXT = Minimum

0.8

VOH

High Level Output Voltage3

@ VDDEXT = Minimum,

IOH = –0.5 mA

2.4

VOL

Low Level Output Voltage

@ VDDEXT = Minimum,

IOL = 2.0 mA

0.4

IIH

High Level Input Current

@ VDDINT = Maximum,

VIN = 3.6 V

μA

IIH

High Level Input Current

@ VDDINT = Maximum,

VIN = 3.6 V

150

μA

IIH

High Level Input Current6

@ VDDINT = Maximum,

VIN = 3.6 V

μA

IIL

Low Level Input Current

@ VDDINT = Maximum,

VIN = 0 V

μA

IIL

Low Level Input Current

@ VDDINT = Maximum,

VIN = 0 V

μA

IIL

Low Level Input Current

@ VDDINT = Maximum,

VIN = 0 V

150

μA

IOZH

Three-State Leakage Current

@ VDDINT = Maximum,

VIN = 3.6 V

μA

IOZL

Three-State Leakage Current

@ VDDINT = Maximum,

VIN = 0 V

μA

Input Pin Capacitance

fIN = 1 MHz

Output Pin Capacitance

fIN = 1 MHz

IDD-PEAK

Supply Current (Internal)

8, 9

325

375

IDD-TYP

Supply Current (Internal)

275

320

IDD-IDLE

Supply Current (Idle)

250

300

IDD-STOPCLK

Supply Current (Power-Down)8, 10

140

175

IDD-STOPALL

Supply Current (Power-Down)8, 11

IDD-PDOWN

Supply Current (Power-Down)8, 12

IAVDD

Analog Supply Current

IAVDD-ADCOFF

Analog Supply Current

1 Applies to all input and bidirectional pins.

2 Applies to input pins CLKIN, RESET, TRST.

3 Applies to all output and bidirectional pins.

4 Applies to all input only pins.

5 Applies to input pins with internal pull-down.

6 Applies to input pins with internal pull-up.

7 Applies to three-stateable pins.

8 The I

DD supply currents are affected by the operating frequency of the device. The guaranteed numbers are based on an assumed CCLK = 160 MHz, HCLK = 80 MHz

for the ADSP-21990BST. IDD refers only to the current consumption on the internal power supply lines (VDDINT). The current consumption at the I/O on the VDDEXT

power supply is very much dependent on the particular connection of the device in the final system.

9 IDD-PEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power measurements made using typical

applications are less than specified. Measured at VDDINT = maximum.

10IDLE denotes the current consumption during execution of the IDLE instruction. Measured at VDDINT = maximum.

11IDD-PDOWN represents the processor operation in full power-down mode with both core and peripheral clocks disabled. Measured at VDDINT = maximum

12IAVDD represents the power consumption of the analog system. Measured at AVDD = maximum.

13The responsibility lies with the user to ensure that the device is operated in such a manner that the maximum allowable junction temperature is not exceeded.

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