TMS320VC549 datasheet(20/64 Pages) TI

номер детали	TMS320VC549

подробное описание детали	FIXED-POINT DIGITAL SIGNAL PROCESSOR

PDF	64 Pages

Scroll/Zoom	100%

производитель	TI [Texas Instruments]

домашняя страница	http://www.ti.com

Logo

20 / 64 page

TMS320VC549

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

memory and parallel I/O interface timing

switching characteristics over recommended operating conditions for a memory read

(MSTRB = 0)†‡ (see Figure 5)

PARAMETER

549-80

549-100

549-120

UNIT

PARAMETER

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

td(CLKL-A)

Delay time, address valid from CLKOUT low§

− 1

td(CLKH-A)

Delay time, address valid from CLKOUT high (transition)¶

− 1

td(CLKL-MSL)

Delay time, MSTRB low from CLKOUT low

− 1

td(CLKL-MSH)

Delay time, MSTRB high from CLKOUT low

− 1

th(CLKL-A)R

Hold time, address valid after CLKOUT low§

− 1

th(CLKH-A)R

Hold time, address valid after CLKOUT high¶

− 1

−1

† Address, PS, and DS timings are all included in timings referenced as address.

‡ See Table 1, Table 2, and Table 3 for address bus timing variation with load capacitance.

§ In the case of a memory read preceded by a memory read

¶ In the case of a memory read preceded by a memory write

TMS320VC549 датащи(PDF) 20 Page - Texas Instruments

TMS320VC549 датащи(HTML) 20 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

датащи скачать

ссылки URL