MAXQ3180-RAN+ datasheet(40/48 Pages) MAXIM

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MAXQ3180 never clears them on its own unless a reset

occurs. The interrupt flags should be cleared by the

master by writing the appropriate register.

The configuration bits OVEN and OCEN allow enable-

or disable-monitoring the overvoltage and overcurrent

events on each phase independently.

Voltage Sag Detection

The MAXQ3180 detects voltage sag events and can

issue interrupt request signals to the master when

these events occur. The sag level threshold is deter-

mined by the setting of the SAGLVL register. The

SAGLVL register represents the 16 most significant bits

of a raw VRMS register. A voltage sag event is detect-

ed if the RMS-voltage value remains below the SAGLVL

threshold for the number of line cycles specified in the

SAGCYC register. The flags SAGA, SAGB, and SAGC

are set when voltage sag is detected on phase A, B, or

C, respectively. If enabled, any of these flags issues an

interrupt request when they are set to 1.

Tamper Condition Detection

The MAXQ3180 detects and reports the following tam-

per conditions:

• Missing Potential. The MAXQ3180 detects a miss-

ing potential condition if a phase voltage waveform

either has a magnitude less than 10% of the full-

scale range or has no zero crossings, i.e., the entire

waveform lies above or below zero. The MISVF bit is

set in the FLAGS status register for phase A, B, or C

to report a missing potential condition. Also, the

MISV flag bit is set in the STATUS1 register, which

can cause an interrupt request signal if enabled.

• Voltage Unbalance. The MAXQ3180 detects a volt-

age unbalance condition if the sum of all three volt-

age signals (e.g., VA + VB + VC) has a magnitude

greater than VUBLVL/2. The VUBLVL register repre-

sents the 16 most significant bits of the raw VRMS

ister to report voltage unbalance. This can cause an

interrupt request signal if enabled.

• Current Unbalance. The MAXQ3180 detects a cur-

rent unbalance condition if the sum of current signals

IA + IB + IC has a magnitude greater than IUBLVL/2.

The IUBLVL register represents the 16 most significant

bits of a raw IRMS register. The IUNBF flag is set in

the STATUS1 register to report a current unbalance.

Meter Units to Real Units Conversion

All energy calculations, including various threshold

checks, are performed internally in fixed format in

meter units. Therefore, the threshold values must be

supplied by the user in meter units as well. This section

describes how to convert real units (V, A, kWh, etc.)

into meter units and vice versa.

The conversion factors are based on the settings

shown in Table 11, defined by the user’s design.

Meter units are defined with respect to the base para-

meters in Table 11 as shown in Table 12.

Low-Power, Multifunction, Polyphase AFE

______________________________________________________________________________________

Table 11. Meter to Real Units Conversion

NAME

DESCRIPTION

DEFAULT VALUE

tFR

Analog scan frame timing. This parameter is defined by the R_ADCRATE setting and

system clock frequency fSYS:

tFR = (R_ADCRATE + 1) x 8/fSYS

Default conditions are R_ADCRATE = 199, fSYS = 8MHz.

200μs/frame

Number of frames per line cycle. This parameter is defined by nominal line frequency fLINE

and frame timing tFR:

NS = 1/(tFR x fLINE)

Default conditions are tFR = 200μs, fLINE = 50Hz.

100 frames/

line cycle

VFS

Full-scale voltage. This is the input voltage that produces full-scale ADC output: 2048 LSB

for positive or -2048 LSB for negative, total 12-bit range. This parameter is defined by the

hardware voltage transducer ratio VTR and ADC full-scale input voltage VFSADC:

VFS = VFSADC x VTR

Default conditions are VFSADC = 1V, VTR = 545V/V (for reference meter design).

545V

IFS

Full-scale current. This is the input current that produces full-scale ADC output: 2048 LSB

for positive or -2048 LSB for negative, total 12-bit range. This parameter is defined by the

hardware current transducer ratio ITR and ADC full-scale input voltage VFSADC:

IFS = VFSADC x ITR

Default conditions are VFSADC = 1V, ITR = 100A/V (for reference meter design).

100A

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