Low-Power, Multifunction, Polyphase AFE

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13

SCLK CYCLE #

(FOR REFERENCE)

SCLK (CKPOL = 0)

SCLK (CKPOL = 1)

MOSI

(FROM MASTER)

MISO

(FROM SLAVE)

SSEL (TO SLAVE)

1

MSB

6

5

4

3

2

1

LSB

2

3

4

5

6

7

8

6

MSB

*NOT DEFINED BUT NORMALLY MSB OF CHARACTER JUST RECEIVED.

5

4

3

2

1

LSB

*

Figure 5a. SPI Interface Timing (CKPHA = 1). With CKPHA = 1 and CKPOL = 1, the SPI interface clocks data into the peripheral

device on the clock’s rising edge and data out of the peripheral on the clock’s falling edge.

1

MSB

6

5

4

3

2

1

LSB

2

3

4

5

6

7

8

MSB

*

*NOT DEFINED BUT NORMALLY LSB OF PREVIOUSLY TRANSMITTED CHARACTER.

6

5

4

3

2

1

LSB

SCLK CYCLE #

(FOR REFERENCE)

SCLK (CKPOL = 0)

SCLK (CKPOL = 1)

MOSI

(FROM MASTER)

MISO

(FROM SLAVE)

SSEL (TO SLAVE)

Figure 5b. SPI Interface Timing (CKPHA = 0). With CKHPA = 0 and CKPOL = 1, the SPI interface clocks data into the peripheral

device on the clock’s falling edge and data out of the peripheral on the clock’s rising edge.

Transfers over the SPI interface always start with the

most significant bit and end with the least significant

bit. All SPI data transfers to and from the MAXQ3180

are always 8 bits (one byte) in length. The MAXQ3180

SPI interface does not support 16-bit character lengths.

The default format (upon power-up or system reset) for

the MAXQ3180 SPI interface is represented in

Figure 5b (CKPOL = 0; CKPHA = 0). In this format, the

SPI clock idle state is low, and data is shifted in and out

on the rising edge of SCLK. Once SPI communication

with the MAXQ3180 has been established, it is possible

to alter the CKPOL and CKPHA format settings (as well

as changing the SSEL signal from active low to active

high) if desired by writing to the R_SPICF mirror register

and then reading from the special command register

UPD_SFR to copy the R_SPICF value into the internal

SPI configuration register.

Whenever the active clock edge is used for sampling

(CKPHA = 0), the transfer cycle must be started with

assertion of the SSEL signal. This requirement means

that the SSEL signal be deasserted and reasserted

between successive transfers. Conversely, when the

inactive edge is used for sampling (CKPHA = 1), the

SSEL signal may remain low through successive