51
0832F–HIREL–02/07
e2v semiconductors SAS 2007
PC7410
Boundary scan testing is enabled through the JTAG interface signals. (BSDL descriptions of the PC7410
are available on the Internet at www.mot.com/PowerPC/teksupport.) The TRST signal is optional in the
IEEE 1149.1 specification but is provided on all PowerPC implementations. While it is possible to force
the TAP controller to the reset state using only the TCK and TMS signals, more reliable power-on reset
performance will be obtained if the TRST signal is asserted during power-on reset. Since the JTAG inter-
face is also used for accessing the common on-chip processor (COP) function of PowerPC processors,
simply tying TRST to HRESET is not practical.
The common on-chip processor (COP) function of PowerPC processors allows a remote computer sys-
tem (typically a PC with dedicated hardware and debugging software) to access and control the internal
operations of the processor. The COP interface connects primarily through the JTAG port of the proces-
sor with some additional status monitoring signals. The COP port requires the ability to independently
assert HRESET or TRST in order to fully control the processor. If the target system has independent
reset sources, such as voltage monitors, watchdog timers, power supply failures or push-button
switches, then the COP reset signals must be merged into these signals with logic.
The arrangement shown in Figure 14-6 on page 50 allows the COP to independently assert HRESET or
TRST, while ensuring that the target can drive HRESET as well. The pull-down resistor on TRST
ensures that the JTAG scan chain is initialized during power-on if a JTAG interface cable is not attached;
if it is attached, it is responsible for driving TRST when needed.
Table 14-2.
COP Pin Definitions
Pins
Signal
Connection
Special Notes
1TDO
TDO
2QACK
QACK
Add 2K pull-down to ground. Must be merged with on-board QACK, if any
3TDI
TDI
4TRST
TRST
Add 2K pull-down to ground. Must be merged with on-board TRST if any
See Figure 14-6 on page 50
5
RUN/STOP
No Connect
Used on 604e; leave no-connect for all other processors
6
VDD_SENSE
VDD
Add 2K pull-up to OVDD (for short circuit limiting protection only)
7TCK
TCK
8
CKSTP_IN
CKSTP_IN
Optional. Add 10K pull-up to OVDD. Used on several emulator products. Useful for
checkstopping the processor from a logic analyzer of other external trigger
9TMS
TMS
10
N/A
11
SRESET
SRESET
Merge with on-board SRESET, if any
12
N/A
13
HRESET
HRESET
Merge with on-board HRESET
14
N/A
Key location; pin should be removed
15
CKSTP_OUT
CKSTP_OUT
Add 10K pull-up to OV
DD
16
Ground
Digital Ground
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