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TS3USB221EDRCR.B датащи(PDF) 15 Page - Texas Instruments

номер детали TS3USB221EDRCR.B
подробное описание детали  TS3USB221E High-Speed USB 2.0 (480Mbps) 1:2 MultiplexerDemultiplexer Switch With Single Enable and IEC Level 3 ESD Protection
PDF  29 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

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Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then
the stub should be less than 200 mm.
Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions.
Avoid crossing over anti-etch, commonly found with plane splits.
Due to high frequencies associated with the USB, a printed circuit board with at least four layers is
recommended; two signal layers separated by a ground and power layer as shown in Figure 7-5.
Signal 1
GND Plane
Power Plane
Signal 2
Figure 7-5. Four-Layer Board Stack-Up
The majority of signal traces should run on a single layer, preferably Signal 1. Immediately next to this layer
should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or
power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing
the number of signal vias reduces EMI by reducing inductance at high frequencies. For more information on
layout guidelines, see High Speed Layout Guidelines and USB 2.0 Board Design and Layout Guidelines.
7.4.2 Layout Example
1
2
3
4
1D-
2D-
9
S
VCC
D+
OE
LEGEND
VIA to Power Plane
VIA to GND Plane
Polygonal Copper Pour
8
7
6
Bypass Capacitor
V+
5
D-
10
2D+
GND
1D+
To Microcontroller
To Microcontroller
To USB Host
USB Port 1
USB Port 2
Figure 7-6. Package Layout Diagram
www.ti.com
TS3USB221E
SCDS263E – SEPTEMBER 2009 – REVISED JULY 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: TS3USB221E



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