TMS320VC5507 datasheet(29/142 Pages) TI2

29 / 142 page

Introduction

April 2004 − Revised January 2008

SPRS244J

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

SUPPLY PINS

CVDD

Digital Power, + VDD. Dedicated power supply for the core CPU.

DVDD

Digital Power, + VDD. Dedicated power supply for the I/O pins.

USBVDD

Digital Power, + VDD. Dedicated power supply for the I/O of the USB

module (DP, DN , and PU)

RDVDD

Digital Power, + VDD. Dedicated power supply for the I/O pins of the RTC

module.

RCVDD

Digital Power, + VDD. Dedicated power supply for the RTC module

AVDD

Analog Power, + VDD. Dedicated power supply for the 10-bit A/D.

ADVDD

Analog Digital Power, + VDD. Dedicated power supply for the digital portion

of the 10-bit A/D.

USBPLLVDD

Digital Power, + VDD. Dedicated power supply pin for the USB PLL.

VSS

Digital Ground. Dedicated ground for the I/O and core pins.

AVSS

Analog Ground. Dedicated ground for the 10-bit A/D.

ADVSS

Analog Digital Ground. Dedicated ground for the digital portion of the10-bit

A/D.

USBPLLVSS

Digital Ground. Dedicated ground for the USB PLL.

MISCELLANEOUS

No connection

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer

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