TMS320VC33 datasheet(29/59 Pages) TI2

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TMS320VC33

DIGITAL SIGNAL PROCESSOR

SPRS087E -- FEBRUARY 1999 -- REVISED JANUARY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251--1443

clock circuit timing

The following table defines the timing parameters for the clock circuit signals.

switching characteristics over recommended operating conditions for on-chip crystal oscillator†

(see Figure 16)

PARAMETER

MIN

TYP

MAX

UNIT

Oscillator internal supply voltage

CVDD

Fundamental mode frequency range

MHz

Vbias

DC bias point (input threshold)

%VO

Rfbk

Feedback resistance

100

300

500

kΩ

Rout

Small signal AC output impedance

250

500

1000

Ω

Vxoutac

AC output voltage with test crystal‡

%VO

Vxinac

AC input voltage with test crystal‡

%VO

Vxoutl

Vxin =Vxinh,Ixout =0,FO=0 (logic input)

VSS -- 0.1

VSS +0.3

Vxouth

Vxin =Vxinl,Ixout =0,FO=0 (logic input)

CVDD -- 0.3

CVDD +0.1

Vinl

When used for logic level input, oscillator enabled

--0.3

0.2 * VO

Vinh

When used for logic level input, oscillator enabled

0.8 * VO

DVDD +0.3

Vxinh

When used for logic level input, oscillator disabled

0.7 * DVDD

DVDD +0.3

Cxout

XOUT internal load capacitance

Cxin

XIN internal load capacitance

td(XIN-H1)

Delay time, XIN to H1 x1 and x0.5 modes

5.5

Iinl

Input current, feedback enabled, Vil =0

μA

Iinh

Input current, feedback enabled, Vil =Vih

--50

μA

† This circuit is intended for series resonant fundamental mode operation.

‡ Signal amplitude is dependent on the crystal and load used.

XOUT

XIN

Crystal

Rfbk

CXIN

CXOUT

ROUT

To internal

clock generator

NOTE A: SeeTable2for valueofRd.

Figure 16. On-Chip Oscillator Circuit

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