SLAS616 datasheet(9/52 Pages) TI2

9 / 52 page

MSP430FE42x2

MIXED SIGNAL MICROCONTROLLER

SLAS616 − JULY 2008

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

special function registers

Most interrupt and module enable bits are collected into the lowest address space. Special function register bits

that are not allocated to a functional purpose are not physically present in the device. Simple software access

is provided with this arrangement.

interrupt enable 1 and 2

UTXIE0

OFIE

WDTIE

rw–0

Address

URXIE0

ACCVIE

NMIIE

rw–0

WDTIE:

Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer

is configured in interval timer mode.

OFIE:

Oscillator-fault-interrupt enable

NMIIE:

Nonmaskable-interrupt enable

ACCVIE:

Flash access violation interrupt enable

URXIE0:

USART0: UART and SPI receive-interrupt enable

UTXIE0:

USART0: UART and SPI transmit-interrupt enable

654

Address

BTIE

rw-0

BTIE:

Basic Timer1 interrupt enable

interrupt flag register 1 and 2

UTXIFG0

OFIFG

WDTIFG

rw–0

rw–1

rw–(0)

Address

02h

URXIFG0

NMIIFG

rw–1

rw–0

WDTIFG:

Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC

power up or a reset condition at the RST/NMI pin in reset mode.

OFIFG:

Flag set on oscillator fault

NMIIFG:

Set via RST/NMI pin

URXIFG0:

USART0: UART and SPI receive flag

UTXIFG0:

USART0: UART and SPI transmit flag

654

Address

BTIFG

rw-0

BTIFG:

Basic Timer1 interrupt flag

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