LP55231 datasheet(20/59 Pages) TI2

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LP55231

SNOSCR5D – MARCH 2013 – REVISED DECEMBER 2016

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Slave device sends acknowledge signal if the slave address is correct

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Master sends control register address (8 bits).

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Slave sends acknowledge signal.

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Master sends data byte to be written to the addressed register.

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Slave sends acknowledge signal.

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If master sends further data bytes, the slave’s control register address is incremented by one after

acknowledge signal. In order to reduce program load time, the LP55231 supports address auto

incrementation. Register address is incremented after each 8 data bits. For example, the whole program

memory page can be written in one serial bus write sequence. Note: serial bus address auto increment is not

supported for register addresses from 16 to 1E.

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Write cycle ends when the master creates stop condition.

7.5.2.2 Control Register Read Cycle

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Master device generates a start condition.

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Master device sends slave address (7 bits) and the data direction bit (r/w = 0).

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Slave device sends acknowledge signal if the slave address is correct

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Master sends control register address (8 bits).

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Slave sends acknowledge signal.

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Master device generates repeated start condition.

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Master sends the slave address (7 bits) and the data direction bit (r/w = 1).

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Slave sends acknowledge signal if the slave address is correct.

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Slave sends data byte from addressed register.

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If the master device sends an acknowledge signal, the control register address is incremented by one. Slave

device sends data byte from addressed register.

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Read cycle ends when the master does not generate acknowledge signal after data byte and generates stop

condition

7.5.2.3 Auto-Increment Feature

The auto-increment feature allows writing several consecutive registers within one transmission. Every time an 8-

bit word is sent to the LP55231, the internal address index counter is incremented by one, and the next register

is written. Table 2 shows writing sequence to two consecutive registers. Auto-increment feature is enabled by

writing EN_AUTO_INCR bit high in the MISC register (addr 36h). Note: serial bus address auto increment is not

supported for register addresses from 16 to 1E.

Table 2. Auto Increment Example

MASTER

START

CHIP

ADDR

=32H

WRITE

REG

ADDR

DATA

STOP

LP55231

ACK

7.6 Register Maps

7.6.1 Register Set

The LP55231 is controlled by a set of registers through the two-wire serial interface port. Some register bits are

reserved for future use. Table 3 below lists device registers, their addresses and their abbreviations. A more

detailed description is given in Control Register Details.

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