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LP55231 датащи(PDF) 19 Page - Texas Instruments

номер детали LP55231
подробное описание детали  LP55231 Nine-Channel RGB, White-LED Driver With Internal Program Memory and Integrated Charge Pump - WQFN
PDF  59 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

LP55231 датащи(HTML) 19 Page - Texas Instruments

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background image
ack from slave
start
MSB Chip Addr LSB
SCL
ack from slave
w
MSB Register Addr LSB
rs
r
MSB
Data
LSB
stop
ack from slave
nack from master
repeated start
data from slave
SDA
start
id =32h
w ack
address = 3Fh
ack
rs
r ack
address 3Fh data
nack
stop
MSB Chip Address LSB
id = 32h
start
MSB Chip Addr LSB
w
ack
MSB Register Addr LSB
ack
MSB
Data LSB
ack
stop
ack from slave
ack from slave
ack from slave
SCL
SDA
start
id = 32h
w
ack
addr = 40h
ack
ack
address 40h data
stop
ADR6
bit7
ADR5
bit6
ADR4
bit5
ADR3
bit4
ADR2
bit3
ADR1
bit2
ADR0
bit1
R/W
bit0
MSB
LSB
0
0
0
1
1
0
1
I
2
C Slave Address (chip address)
19
LP55231
www.ti.com
SNOSCR5D – MARCH 2013 – REVISED DECEMBER 2016
Product Folder Links: LP55231
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Programming (continued)
7.5.2 I2C-Compatible Chip Address
ASEL0 and ASEL1 pins configure the chip address for the LP55231 as shown in Table 1.
Table 1. LP55231 Chip Address Configuration
ASEL1
ASEL0
ADDRESS
8-BIT HEX ADDRESS
(HEX)
WRITE/READ
GND
GND
32
64/65
GND
VEN
33
66/67
VEN
GND
34
68/69
VEN
VEN
35
6A/6B
Figure 21. LP55231 Chip Address
Id = Chip Address = 32h For Lp55231. This data pattern writes temperature information to the temperature write
register (40h).
Figure 22. Write Cycle (W = Write; SDA = 0),
Id = Chip Address = 32h For LP55231. This data pattern reads temperature information from the temperature read
register (3fh). when a read function is to be accomplished, a write function must precede the read function, as shown
above.
Figure 23. Read Cycle (R = Read; SDA = 1)
7.5.2.1 Control Register Write Cycle
Master device generates start condition.
Master device sends slave address (7 bits) and the data direction bit (r/w = 0).



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