EF6805P2 datasheet(12/31 Pages) STMICROELECTRONICS

12 / 31 page

Figure 14 : RESET Configuration.

External Reset Input - The MCU will be reset if a lo-

gical zero is applied to the RESET input for a period

longer than one machine cycle (tcyc). Under this type

of reset, the Schmitt trigger switches off at VIRES- to

provide an internal reset voltage.

Low-Voltage Inhibit (LVI) - The optional low-voltage

detection circuit causes a reset of the MCU if the po-

wer supply voltage falls below a certain level (VLVI).

The only requirement is that VCC remains at or below

the VLVI threshold for one tcyc minimum. In typical

applications, the VCC bus filter capacitor will elimi-

nate negative-going voltage glitches of less than

one tcyc. The output from the low-voltage detector is

connected directly to the internal reset circuitry. It al-

so forces the RESET pin low via a strong discharge

device through a resistor. The internal reset will be

removed once the power supply voltage rises above

a recovery level (VLVR), at which time a normal po-

wer-on-reset occurs.

INTERNAL CLOCK GENERATOR OPTIONS

The internal clock generator circuit is designed to re-

quire a minimum of external components. A crystal,

a resistor, a jumper wire, or an external signal may

be used to generate a system clock with various sta-

bility/cost tradeoffs. The oscillator frequency is inter-

nally divided by four to produce the internal system

clocks. A manufacturing mask option is used to se-

lect crystal or resistor operation.

The different connection methods are shown in fig-

ure 15. Crystal specifications and suggested PC

board layouts are given in figure 16. A resistor se-

lection graph is given in figure 17.

The crystal oscillator start-up time is a function of

many variables : crystal parameters (especially RS),

oscillator load capacitances, IC parameters, am-

bient temperature, and supply voltage. To ensure

rapid oscillator start up, neither the crystal charac-

teristics nor the load capacitances should exceed

recommendations.

When utilizing the on-board oscillator, the MCU

should remain in a reset condition (reset pin voltage

below VIRES+) until the oscillator has stabilized at its

operating frequency. Several factors are involved in

calculating the external reset capacitor required to

satisfy this condition ; the oscillator start-up voltage,

the oscillator stabilization time, the minimum VIRES+,

and the reset charging current specification.

Once VCC minimum is reached, the external RESET

capacitor will begin to charge at a rate dependent on

the capacitor value. The charging current is supplied

from VCC through a large resistor, so it appears al-

most like a constant current source until the reset

voltage rises above VIRES+. Therefore, the RESET

pin will charge at approximately :

(VIRES+).Cext =IRES.tRHL

Assuming the external capacitor is initially dischar-

ged.

EF6805U3

12/31

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