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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VNF1048F датащи(PDF) 28 Page - STMicroelectronics |
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VNF1048F датащи(HTML) 28 Page - STMicroelectronics |
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28 / 49 page  Bit # Name Description DIAGS = VS_UV or HSHT or VDS_MAX or FUSE_LATCH or DEV_OVT or NTC_OVT or VGS_LOW or DIS_OUT_FAULT or CS_UV 26 DE Device error bit The DE is a logical OR combination of errors related to device specific blocks: charge pump output undervoltage, NVM download failure, oscillator failure DE = CP_LOW or NVM_FAIL or OSC_FAIL 25 OVC Overcurrent bit The OVC is a ‘realtime’ bit indicating an overcurrent event (VIP-fuse counter running) 24 FS Fail-safe If the FS bit is set, the device was forced into a safe state. This bit is set in the fail-safe state (SR#1.FAILSAFE_ST = 1) FS = FAILSAFE_ST 6.11 Address map Table 33. RAM memory map Address Name Access type Content 01h Control Register 1 R/W CR#1: 1st Control Register (CONTROLS) 02h Control Register 2 R/W CR#2: 2nd Control Register (CONFIG 1) 03h Control Register 3 R/W CR#3: 3rd Control Register (CONFIG 2) … … … … 11h Status register 1 R/C SR#1: 1st status register (DIAGNOSTICS + PROTECTIONS) 12h Status register 2 R SR#2: 2nd status register (CURRENT SENSE) 13h Status register 3 R SR#3: 3rd status register (NTC + TJ) 14h Status register 4 R SR#4: 4th status register (VOUT + VDS) 15h Status register 5 R/C SR#5: 5th status register (SELFTEST VDS) 16h Status register 6 R/C SR#6: 6th status register (SELFTEST STUCK ON) 17h Status register 7 R/C SR#7: 7th status register (SELFTEST CURRENT SENSE) 18h Status register 8 R SR#8: 8th status register (HSHT) … … … … 21h Reserved 22h Reserved VNF1048F SPI functional description DS13084 - Rev 8 page 28/49 |
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